Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including ... Perform block and toplevel linting, CDC analysis, and power analysis. Assist with synthesis ...
Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including ... Perform block and toplevel linting, CDC analysis, and power analysis. Assist with synthesis ...
DSP System Architect
San Jose, CA · On-site
$110K - $200K/yr
... * Assist customers on system-level performance and algorithmic issues. * Define and design DSP architectures for high-speed SerDes and optical transceivers. * Develop and maintain end-to-end system ...
DSP System Architect
San Jose, CA · On-site
$110K - $200K/yr
... * Assist customers on system-level performance and algorithmic issues. * Define and design DSP architectures for high-speed SerDes and optical transceivers. * Develop and maintain end-to-end system ...
DSP System Architect
$285.50K/yr
... * Assist customers on system-level performance and algorithmic issues. * Define and design DSP architectures for high-speed SerDes and optical transceivers. * Develop and maintain end-to-end system ...
DSP System Architect
$285.50K/yr
... * Assist customers on system-level performance and algorithmic issues. * Define and design DSP architectures for high-speed SerDes and optical transceivers. * Develop and maintain end-to-end system ...
Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including ... Perform block- and top-level linting, CDC analysis, and power analysis. Assist with synthesis ...
Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including ... Perform block- and top-level linting, CDC analysis, and power analysis. Assist with synthesis ...
What You Can Expect Complete responsibility for PCIe/Serdes PHY Validation in post-silicon ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
What You Can Expect Complete responsibility for PCIe/Serdes PHY Validation in post-silicon ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
Your Team, Your Impact The PCIe Gen 6, Gen 7 and High-speed Serdes product lines are built on a 10 ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
Your Team, Your Impact The PCIe Gen 6, Gen 7 and High-speed Serdes product lines are built on a 10 ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
Principal Mixed Signal Design Engineer
Beaverton, OR · On-site
$210.20K/yr
Technical Leadership: Provide technical leadership for complex SerDes products. * Layout ... Collaborate with cross-functional teams to define requirements and specifications. Assist in ...
Principal Mixed Signal Design Engineer
Beaverton, OR · On-site
$210.20K/yr
Technical Leadership: Provide technical leadership for complex SerDes products. * Layout ... Collaborate with cross-functional teams to define requirements and specifications. Assist in ...
Oversee analog and mixed-signal circuits used in automotive SerDes products throughout the product ... Collaborate with cross-functional teams to define requirements and specifications. Assist in ...
Oversee analog and mixed-signal circuits used in automotive SerDes products throughout the product ... Collaborate with cross-functional teams to define requirements and specifications. Assist in ...
Oversee analog and mixed-signal circuits used in automotive SerDes products throughout the product ... Collaborate with cross-functional teams to define requirements and specifications. Assist in ...
Oversee analog and mixed-signal circuits used in automotive SerDes products throughout the product ... Collaborate with cross-functional teams to define requirements and specifications. Assist in ...
Define and architect low-power DSP architectures for 224G PAM4 and 448G SerDes designs, driving key ... These tools assist our recruitment team but do not replace human judgment. Final hiring decisions ...
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Define and architect low-power DSP architectures for 224G PAM4 and 448G SerDes designs, driving key ... These tools assist our recruitment team but do not replace human judgment. Final hiring decisions ...
Characterize and validate PCIe, high speed SerDes IPs and ICs with lab instruments such as ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
Characterize and validate PCIe, high speed SerDes IPs and ICs with lab instruments such as ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
Characterize and validate PCIe, high speed SerDes IPs and ICs with lab instruments such as ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
Characterize and validate PCIe, high speed SerDes IPs and ICs with lab instruments such as ... These tools must not be used to record, assist with, or enhance responses in any way. Our ...
The firmware you develop will manage complex system and IP integration, SERDES configuration, link ... * Assist with software quality gates and validation criteria at each development phase Product ...
The firmware you develop will manage complex system and IP integration, SERDES configuration, link ... * Assist with software quality gates and validation criteria at each development phase Product ...
Principal SW Developer
Auburn Hills, MI · On-site
$127.80K - $171.30K/yr
... assist, recording/streaming) across embedded SoC and ECU platforms development lifecycle, from ... Integration: Integrate camera drivers (GMSL/FPD/CSI), SerDes, and SoC video pipelines; manage ...
Principal SW Developer
Auburn Hills, MI · On-site
$127.80K - $171.30K/yr
... assist, recording/streaming) across embedded SoC and ECU platforms development lifecycle, from ... Integration: Integrate camera drivers (GMSL/FPD/CSI), SerDes, and SoC video pipelines; manage ...
Digital Design Engineer - Automotive
Colorado Springs, CO · On-site
$151.66K - $227.48K/yr
Knowledge of advanced mixed-signal SerDes transceiver architectures is a plus * Excellent knowledge ... Perform block and top level Linting, CDC, power analysis. Assist with synthesis constraints and ...
Digital Design Engineer - Automotive
Colorado Springs, CO · On-site
$151.66K - $227.48K/yr
Knowledge of advanced mixed-signal SerDes transceiver architectures is a plus * Excellent knowledge ... Perform block and top level Linting, CDC, power analysis. Assist with synthesis constraints and ...
Digital Design Engineer - Automotive
$151.66K - $227.48K/yr
Knowledge of advanced mixed-signal SerDes transceiver architectures is a plus * Excellent knowledge ... Perform block and top level Linting, CDC, power analysis. Assist with synthesis constraints and ...
Digital Design Engineer - Automotive
$151.66K - $227.48K/yr
Knowledge of advanced mixed-signal SerDes transceiver architectures is a plus * Excellent knowledge ... Perform block and top level Linting, CDC, power analysis. Assist with synthesis constraints and ...
Digital Design Engineer - Automotive
$151.66K - $227.48K/yr
Knowledge of advanced mixed-signal SerDes transceiver architectures is a plus * Excellent knowledge ... Perform block and top level Linting, CDC, power analysis. Assist with synthesis constraints and ...
Digital Design Engineer - Automotive
$151.66K - $227.48K/yr
Knowledge of advanced mixed-signal SerDes transceiver architectures is a plus * Excellent knowledge ... Perform block and top level Linting, CDC, power analysis. Assist with synthesis constraints and ...
Digital Design Engineer - Automotive
$151.66K - $227.48K/yr
Knowledge of advanced mixed-signal SerDes transceiver architectures is a plus * Excellent knowledge ... Perform block and top level Linting, CDC, power analysis. Assist with synthesis constraints and ...
Digital Design Engineer - Automotive
$151.66K - $227.48K/yr
Knowledge of advanced mixed-signal SerDes transceiver architectures is a plus * Excellent knowledge ... Perform block and top level Linting, CDC, power analysis. Assist with synthesis constraints and ...
Fundamentally the role is to help secure customer design wins and assist customers in bringing ... Strong working knowledge of high-speed (10Gbps+) phy and SerDes * Experience with Ethernet system ...
Fundamentally the role is to help secure customer design wins and assist customers in bringing ... Strong working knowledge of high-speed (10Gbps+) phy and SerDes * Experience with Ethernet system ...
Engineer, Digital Design Engineering
Colorado Springs, CO · On-site
$88.24K - $121.33K/yr
Knowledge of advanced mixed-signal SerDes transceiver architectures is a plus * Knowledge of ... Linting, CDC, power analysis, and AI as needed. Assist with synthesis constraints and timing ...
Engineer, Digital Design Engineering
Colorado Springs, CO · On-site
$88.24K - $121.33K/yr
Knowledge of advanced mixed-signal SerDes transceiver architectures is a plus * Knowledge of ... Linting, CDC, power analysis, and AI as needed. Assist with synthesis constraints and timing ...
Assistant Serdes information
What is the difference between Assistant Serdes vs Serdes Technician?
| Aspect | Assistant Serdes | Serdes Technician |
|---|---|---|
| Credentials | Typically high school diploma or equivalent; on-the-job training | Technical certifications or associate degree often preferred |
| Work Environment | Manufacturing or data center settings, assisting with equipment setup | Maintenance, troubleshooting, and repairing Serdes equipment |
| Job Responsibilities | Supporting Serdes operations, basic testing, and monitoring | Performing detailed diagnostics, repairs, and calibration |
Assistant Serdes roles focus on supporting Serdes operations with basic tasks, while Serdes Technicians handle advanced troubleshooting and repairs. The Technician position generally requires more technical certifications and hands-on experience, making it a more specialized role within the same industry.

Full-time
Medical, Dental, Vision, Retirement, PTO
Posted 12 days ago
Job description
About Analog Devices
Analog Devices, Inc. (NASDAQ:ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more atwww.analog.comand onLinkedInandTwitter (X).
Join our Automotive OpenGMSL Team as a Staff Digital Design Engineer! We are seeking an experienced, self-motivated, and passionate engineer to lead, architect, and design cutting-edge products for Automotive SerDes applications.
OpenGMSL (Gigabit Multimedia Serial Link) is the leading highspeed invehicle serial link technology in the automotive industry. It enables safe and secure transport of video and data while significantly reducing the cost, weight, and complexity of vehicle cable harnesses.
Our extensive portfolio of products is in full production, with millions of vehicles worldwide relying on it daily. OpenGMSL offers cost-effective video and data transport and bridging for various applications, including basic information displays and rearview cameras in mass-market vehicles, safety-critical cameras in autonomous vehicles, and high-resolution touch screens in high-end vehicles. Beyond automotive, OpenGMSL solutions are widely used in industrial and medical systems as well as in growing robotics applications.
The position is based in Beaverton, Oregon, or Colorado Springs, Colorado.
Responsibilities:
- Digital Architecture and Design: Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including Gigabitspeed serial interfaces and video and data routing solutions.
- Develop NextGeneration Technologies: Architect, develop, and actively contribute to nextgeneration OpenGMSL technologies, including the definition of new architectures and participation in the development of OpenGMSL technical standards for future product generations.
- Specification Ownership: Write detailed block and subsystem-level specifications for design and implementation.
- RTL Design and Implementation: Use Verilog and SystemVerilog to design digital blocks, subsystems, and toplevel designs.
- Verification and Coverage Closure: Develop blocklevel testbenches, verify block functionality, and collaborate with verification teams to achieve fullchip verification and coverage closure.
- Digital Backend: Perform block and toplevel linting, CDC analysis, and power analysis. Assist with synthesis constraints and timing closure.
- MixedSignal Integration: Communicate closely with mixed-signal designers and verification engineers to support mixedsignal simulations and realnumber modeling across the analog/digital boundary.
- Documentation and Design Reviews: Prepare technical documentation and lead architecture, design, and peer reviews.
- Lab Evaluation and Debug: Support silicon bringup, characterization, and debug activities.
- CrossFunctional Collaboration: Collaborate across analog, digital, verification, test, and product definition teams to define requirements, support production test development, and ensure successful product execution.
- Technical Leadership:Provide technical leadership for complex SerDes subsystems and products.
Minimum Qualifications:
- MSEE or Equivalent: Master's degree in Electrical Engineering or equivalent with 5+ years of relevant experience or PhD with 3+ years of relevant experience.
- Digital Design: Experience designing and verifying complex digital systems using Verilog/SystemVerilog.
- System Architecture & Implementation: Demonstrated ability to architect and plan designs at the system level, translating high-level product concepts into robust design implementations.
- Communication Skills: Clear and concise written and verbal communication skills, with team working experience and a proactive approach to problem-solving.
- SerDes & Communications Expertise: Understanding of communication theory, high-speed SerDes transceiver architectures, and video/data transport.
- Design Trade-Offs & Physical Implementation: Solid understanding of digital and analog design trade-offs, with experience in timing analysis, power estimation, physical design, and DFT concepts.
- Lab & Silicon Debug Experience: Hands-on experience with silicon bring-up and debug
Preferred Qualifications:
- SerDes Standards and Protocols: Expertise in high-speed SerDes standards and protocols, including Ethernet, USB, PCIe, and/or video (DisplayPort, CSI/DSI, HDMI)
- Technical Standards Experience: Experience authoring SerDes technical standards and/or participating in industry standards committees.
- Behavioral Modeling:Experience with behavioral modeling, including verification of mixed-signal systems with behavioral modeling.
- Team Leadership:Experience leading teams and/or projects.
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
EEO is the Law: Notice of Applicant Rights Under the Law.
Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/DaysThe expected wage range for a new hire into this position is $134,644 to $201,966.Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors.
This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.
This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.