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Asic Verification Manager Jobs in Boston, MA (NOW HIRING)

Apple Inc.

PHY Design Verification Engineer

Waltham, MA · On-site

$184.70 - $324.80/hr

Develop and execute both directed and constrained random tests, debug failures, manage bug tracking ... Excellent knowledge and experience of ASIC verification flows including test bench development ...

Apple Inc.

Wireless Design Verification Engineer

Waltham, MA · On-site

$184.70 - $324.80/hr

Develop and execute both directed and constrained random tests, debug failures, manage bug tracking ... Knowledge and experience of ASIC verification flows including test bench development, constrained ...

Anduril Industries

FPGA Verification Engineer

Waltham, MA · On-site

$132K - $182K/yr

Recommend new tools and practices for continuous improvement in the group's ASIC / FPGA ... Experience using revision control systems such as Git or Subversion to manage source code ...

Slope

FPGA Verification Engineer

Waltham, MA · On-site

$166 - $220/hr

Recommend new tools and practices for continuous improvement in the group's ASIC / FPGA ... Experience using revision control systems such as Git or Subversion to manage source code ...

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Asic Verification Manager information

What does an Asic Verification Manager do?

An ASIC Verification Manager leads a team responsible for verifying the functionality and performance of ASIC designs before production. They develop verification strategies, oversee testbench creation, and ensure compliance with design specifications. Their role includes managing project timelines, collaborating with design and software teams, and improving verification methodologies. Strong leadership, technical expertise in verification tools, and experience in UVM and SystemVerilog are essential for success in this role.

What are some of the primary challenges faced by Asic Verification Managers in their daily work?

ASIC Verification Managers often navigate the complexities of verifying highly integrated, feature-rich designs under tight development timelines. They manage large teams of engineers, coordinate cross-functional communication with design, physical implementation, and firmware groups, and are responsible for developing and executing comprehensive verification plans. Balancing resource allocation, ensuring thorough test coverage, and adapting to evolving project requirements are common challenges. Success in this role often depends on strong organizational skills, attention to technical detail, and the ability to anticipate and resolve verification bottlenecks promptly.

What are the key skills and qualifications needed to thrive in the Asic Verification Manager position, and why are they important?

To thrive as an ASIC Verification Manager, you need a deep understanding of digital design and verification methodologies, experience with hardware description languages (HDLs) such as Verilog or VHDL, and a degree in electrical engineering or a related field. Familiarity with verification tools like UVM, SystemVerilog, simulation environments, and code coverage analysis is typically required, along with knowledge of industry standards. Strong leadership, project management, effective communication, and team-building abilities help set top candidates apart. These skills and qualities are critical to ensuring thorough verification cycles, timely project delivery, and successful cross-functional team collaboration in complex semiconductor development projects.

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Asic Verification Manager jobs near you
Infographic showing various Asic Verification Manager job openings in Boston, MA as of August 2026, with employment types broken down into 100% Full Time. Highlights an 100% In-person job distribution.

SoC/ASIC Design Verification Engineer

Boston, MA

zeroRISC
See more jobs at zeroRISCexternal

Full-time

Re-posted 12 days ago

Job description

zeroRISC
 
zeroRISC is redefining chip security and supply chain integrity by empowering device owners and operators in crucial sectors like silicon production, IoT, and critical infrastructure with full device ownership, control, and visibility. Led by the founders of the OpenTitan secure silicon project, zeroRISC is driving commercial adoption of high assurance software and services rooted in open silicon. Our products forge an immutable connection between hardware and software, enabling users to trust their devices no matter where they’re built or where they’re deployed.
 
Role Overview
 
As a zeroRISC SoC/ASIC Design Verification Engineer, you will develop, verify, and maintain silicon in security-sensitive settings, including root-of-trust technology. You will elevate and solidify zeroRISC's status as the leading provider of secure silicon IP by developing essential verification collateral. You will interact directly with zeroRISC customers to understand their requirements and deliver solutions benefitting both customer and zeroRISC alike. You will participate in the whole chip design process from architecture to tapeout and silicon validation. By engaging with the world's premier open-source silicon community, you will support our mission of open secure silicon everywhere. We're looking for engineers with strong design verification skills (and a long view of secure system architecture) who are also fast, flexible learners and enthusiastic about open source.
Key Responsibilities:
  • Verify ASIC/SoC functionality, performance, security, and power throughout the full chip design life cycle, from test plan definition to sign-off
  • Build high quality verification environments at the chip/top and block levels following engineering best practices
  • Write thorough verification documentation including test plans
  • Diagnose, debug, and resolve regression failures and other errors
  • Achieve coverage closure
  • Ensure design functionality while upholding stringent timelines in collaboration with architecture, design, software, system, and silicon validation teams as well as engineering program managers
What We’re Looking For:
  • Bachelor’s degree in Electrical Engineering or Computer Science, or a related technical field or equivalent experience
  • 4 years of experience with simulation-based verification methodologies and languages such as UVM and SystemVerilog or formal verification-based techniques including industry standard tools
  • Experience developing and maintaining testbenches, test cases, and verification environments for simulation-based verification or formal verification environments
Preferred Qualifications (not required):
  • Master’s or PhD in Electrical Engineering or Computer Science, or a related technical field or equivalent experience
  • Knowledge of security ASICs or accelerators (e.g. cryptography accelerators or GPUs)
  • Knowledge of computer architecture and memory subsystem architectures
  • Experience verifying low power designs
  • Experience with scripting languages such as Python
Why Join Us?
  • Your work will directly contribute to the development of cutting-edge security solutions, protecting critical systems in industrial and IoT environments
  • As a seed-stage startup, this role offers significant opportunities for learning and career growth
  • Join a close-knit, innovative team where you can learn, grow, and contribute to building something meaningful in the security space

We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.