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Asic Verification Engineer Jobs in Seattle, WA (NOW HIRING)

K2 Space

Senior ASIC Emulation Engineer

Seattle, WA

$170K - $250K/yr

Accelerate overall verification throughput by helping DV team run targeted and highvalue tests in ... Engineering, or related field. * 5+ years of experience in ASIC/SoC development, focused on ...

K2 Space

Senior ASIC Emulation Engineer

Seattle, WA · On-site

$170K - $250K/yr

Accelerate overall verification throughput by helping DV team run targeted and high-value tests in ... Engineering, or related field. * 5+ years of experience in ASIC/SoC development, focused on ...

K2 Space

Senior ASIC Emulation Engineer

Seattle, WA · On-site

$170K - $250K/yr

Accelerate overall verification throughput by helping DV team run targeted and high‑value tests ... Engineering, or related field. * 5+ years of experience in ASIC/SoC development, focused on ...

K2 Space

Senior ASIC Physical Design Engineer

Seattle, WA · On-site

$170K - $250K/yr

Collaborate with front-end, verification, and DFT teams to ensure clean handoff and predictable ... Computer Engineering, or related field. * 5-10 years of experience in ASIC physical design for ...

K2 Space

Senior ASIC Physical Design Engineer

Seattle, WA · On-site

$170K - $250K/yr

Collaborate with front-end, verification, and DFT teams to ensure clean handoff and predictable ... Computer Engineering, or related field. * 5-10 years of experience in ASIC physical design for ...

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Showing results 21-40

All JobsAsic Verification Engineer JobsAsic Verification Engineer Jobs in Seattle, WA

Asic Verification Engineer information

See Seattle, WA salary details

$100.2K

$177.7K

$235.7K

How much do asic verification engineer jobs pay per year?

As of Sep 6, 2026, the average yearly pay for asic verification engineer in Seattle, WA is $177,720.00, according to ZipRecruiter salary data. Most workers in this role earn between $154,900.00 and $199,800.00 per year, depending on experience, location, and employer.

What is an ASIC Verification Engineer?

An ASIC Verification Engineer is a professional who specializes in testing and validating the design of Application-Specific Integrated Circuits (ASICs) to ensure they function correctly according to specifications. They develop testbenches, write test cases, and use simulation tools to detect and debug design errors before the chip is manufactured. Their work is critical in preventing costly mistakes and ensuring the final product meets performance and reliability standards. ASIC Verification Engineers often collaborate closely with design engineers to understand requirements and resolve issues.

What is an ASIC Verification Engineer?

An ASIC verification engineer works with system designers and architects to test performance and validate hardware components and systems. You plan and develop a verification environment while coordinating with developers and architects throughout the design process. Your duties involve working closely with these other teams during the design process. Your responsibilities may include using computer hardware languages such as Verilog. In this career, you work on hardware design and use algorithms, data structure analysis, and other advanced design techniques.

What are the key skills and qualifications needed to thrive as an ASIC Verification Engineer, and why are they important?

To thrive as an ASIC Verification Engineer, you need a solid background in digital design, computer architecture, and verification methodologies, typically supported by a degree in electrical engineering or a related field. Familiarity with tools and languages like SystemVerilog, UVM, simulation environments, and waveform viewers is essential, and certifications in verification or design may be beneficial. Strong analytical thinking, attention to detail, and effective communication are crucial soft skills for debugging complex designs and collaborating with design teams. These skills and qualities are vital to ensure that ASIC designs are thoroughly tested, compliant with specifications, and delivered with high quality and reliability.

What are some common challenges faced by ASIC Verification Engineers during the verification process?

ASIC Verification Engineers often encounter challenges such as dealing with complex designs, debugging intricate issues, and ensuring thorough coverage of all design specifications. Coordinating with design and RTL teams to clarify requirements and resolve discrepancies is a frequent part of the job. Additionally, managing tight project timelines while maintaining high verification quality requires effective time management and strong communication skills. Continuous learning is also important, as verification methodologies and tools evolve rapidly in this field.

What is the difference between Asic Verification Engineer vs Digital Design Engineer?

AspectAsic Verification EngineerDigital Design Engineer
Primary FocusVerifying ASIC designs for correctness and functionalityDesigning digital circuits and architectures
Skills & CertificationsHardware description languages (HDL), verification tools, scriptingHDL, digital logic, circuit design
Work EnvironmentVerification labs, simulation environmentsDesign teams, CAD tools, prototyping labs
Industry UsageSemiconductor, electronics manufacturingSemiconductor, consumer electronics, computing

While both roles require expertise in HDL and semiconductor industry experience, Asic Verification Engineers focus on testing and validating ASIC designs, ensuring they meet specifications. Digital Design Engineers primarily create and develop digital circuits. Both roles are essential in the chip development process but differ in their core responsibilities and daily tasks.

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Asic Verification Engineer jobs near you
Infographic showing various Asic Verification Engineer job openings in Seattle, WA as of August 2026, with employment types broken down into 91% Full Time, 5% Part Time, and 4% Contract. Highlights an 88% Physical, 4% Hybrid, and 8% Remote job distribution, with an average salary of $177,720 per year, or $85.4 per hour.

AMS Verification Engineer (RFIC Engineering)

SpaceX

Redmond, WA • On-site

$145K - $200K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 12 days ago

SpaceX rating

8.7

Company rating: 8.7 out of 10

Based on 152 frontline employees who took The Breakroom Quiz

16th of 72 rated aerospace companies

Job description

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
AMS VERIFICATION ENGINEER (SILICON ENGINEERING)
At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe.
We are seeking a motivated, proactive, and intellectually curious AMS Verification Engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation RFICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Join us to help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.
RESPONSIBILITIES:
  • Develop and own "analog-on-top" and "digital-on-top" design verification flows for full-chip simulations of in-house RFICs and RF-SoCs
  • Develop testbenches and flows to simulate critical interfaces between RFICs/SoCs
  • Work with designers to improve speed/accuracy of simulations for advanced mixed-signal IPs (PLLs, DACs, ADCs, etc.)
  • Work with designers to create behavioral models of RF/analog/mixed-mode circuit blocks, and employ these models in chip verification
  • Work with ATE test engineering team to develop and prototype testplans
  • Setup and run EM/IR simulations

BASIC QUALIFICATIONS:
  • Bachelor's degree in an engineering discipline
  • 1+ years of research and/or industry experience in the field of integrated circuit design/verification

PREFERRED SKILLS AND EXPERIENCE:
  • Master's degree or PhD in an engineering discipline with emphasis in integrated circuit design/verification
  • Experience with AMS simulation tools and flows
  • Experience with annotated gate-level simulation within an AMS simulator
  • Experience in System-Verilog, UVM, Python
  • Experience in writing behavioral models for analog/mixed-mode IPs in Verilog-A/AMS
  • Understanding of analog circuit fundamentals, and experience simulating circuits such as LDOs, bandgaps, DACs, ADCs, baseband amplifiers, mixers, RF amplifiers, oscillators, PLLs, etc.
  • Understanding of combinational logic and basic digital circuit blocks, such as flip-flops, counters, buffers, synchronizers, serializers/de-serializers, etc.; ability to understand RTL and gate-level netlists

ADDITIONAL REQUIREMENTS:
  • Ability to work long hours and weekends as necessary to support critical milestones

COMPENSATION AND BENEFITS:
Pay Range:
Level 1: $125,000.00 - $165,000.00
Level 2: $145,000.00 - $200,000.00
Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.
Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short and long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation and will be eligible for 10 or more paid holidays per year. Employees in Washington State accrue paid sick time in compliance with state and federal law. Company shuttles are offered to employees for roundtrip travel from select Seattle locations to the SpaceX Redmond office Monday to Friday.
ITAR REQUIREMENTS:
  • To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX's Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com.

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Industry

Aerospace product and parts manufacturing, data services, guided missile and space vehicle manufacturing and satellite telecommunications

Company size

1,001 - 5,000 Employees

Headquarters location

Hawthorne, CA, US

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