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Asic Engineering Jobs in Utah (NOW HIRING)

Senior FPGA Design Engineer

Provo, UT

$116K - $160K/yr

Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 5 years of prior relevant experience Experience with at least one of the following: * FPGA/ASIC ...

Bachelor of Science in Civil Engineering/Architectural Engineering from an ABET Accredited school. * Strong knowledge of structural buildings codes: IBC, ASIC 360, ASIC 341, ASIC358, ASCE7, AISI, etc.

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Showing results 1-20

Asic Engineering information

What is the difference between Asic Engineering vs FPGA Design?

AspectAsic EngineeringFPGA Design
Required CredentialsBachelor's or Master's in Electrical Engineering, VLSI, or related fields; often certifications in ASIC designBachelor's or Master's in Electrical Engineering, Digital Design, or related fields; certifications less common
Work EnvironmentDesigning custom chips in semiconductor labs or design houses; involves hardware and software integrationDeveloping programmable logic designs in labs or FPGA development environments; focuses on reconfigurable hardware
Industry UsageUsed in high-volume consumer electronics, telecom, and automotive industries for custom chip solutionsCommon in prototyping, testing, and specialized applications across various industries

Asic Engineering and FPGA Design share foundational knowledge in digital logic and hardware description languages. However, Asic Engineers focus on designing permanent, high-volume chips, while FPGA Designers work with reconfigurable hardware for testing and specialized tasks. Both roles require similar educational backgrounds but differ in application and design processes.

What cities in Utah are hiring for Asic Engineering jobs? Cities in Utah with the most Asic Engineering job openings:
Infographic showing various Asic Engineering job openings in Utah as of July 2026, with employment types broken down into 14% As Needed, 83% Full Time, 2% Contract, and 1% Summer. Highlights an 85% Physical, 9% Hybrid, and 6% Remote job distribution.

Direct-Hire -- Principal Digital ASIC Design Engineer -- Clearfield, UT (Onsite)

TWC Global Services LLC

Clearfield, UT โ€ข On-site

$126K/yr

Full-time

Re-posted 10 days ago


Job description

Job Title: Principal Digital ASIC Design Engineer

Location: Clearfield, UT (Onsite)

Job Type: Direct-Hire Position

Industry(ies) - Aerospace / Defense

Primary Skills - Digital ASIC design

Secondary Skills - Digital IC design

Occupational Categories - Engineering/ Manufacturing/ Production/ Operations

Job Description:

We are seeking talented and motivated individuals to tackle challenging engineering problems in advanced digital IC design. 

  • As a Principal Digital ASIC Designer, you will be responsible for designing high-performance digital ASICs in advanced technologies.
  • You will be responsible for implementing designs from RTL through synthesis.
  • You will work in multi-disciplinary teams with opportunities to learn, grow and contribute to a variety of projects in different application areas.

Duties/Responsibilities:

  • Drive solutions to complex problems with limited direction contribute to requirements development, propose ways forward, and adapt appropriately to changes in requirements.
  • Independently performs complex ASIC architectures and designs.
  • Provide insight and suggest design modifications based on simulation results.
  • Identify program/system-level technical risks and develop and execute mitigation strategies.
  • Manage a task with multiple engineers and effectively communicate status to project leadership and customers.
  • Mentor less experienced engineers and provide thoughtful, constructive feedback.
  • Perform other duties as assigned.

Skills/Abilities:

  • Proficiency in ASIC design, microprocessor programming or embedded computing.
  • Understanding of ASIC design and general computer architecture.
  • Ability to write detailed design specifications.
  • Computer programming and coding abilities.
  • Excellent verbal and written communication skills.
  • Excellent mathematical skills.
  • Excellent organizational skills and attention to detail.
  • Excellent time management skills with the proven ability to meet deadlines.
  • Strong analytical and problem-solving skills.
  • Ability to prioritize tasks.
  • Thorough understanding of engineering theories and procedures.

Education:

  • Requires bachelor's degree in engineering, or related field. Master’s degree preferred.

Experience:

  • Requires 7-10 years of experience with a bachelor's degree.

Additional Job Description:

  • Applicants should possess solid skills in front-end digital systems design with experience in design flows from Cadence or Synopsys.
  • Be fluent in System Verilog, Verilog or VHDL and familiar with LINT, simulation and synthesis.
  • Familiarity with architectures for secure systems design, e.g., cryptographic encoders / decoders or tagged processor architectures is a plus.
  • Demonstrated experience with successful tape-outs at advanced nodes is desired. Experience leading and managing design teams is also a plus.
  • Applicants selected for this position will be required to obtain and maintain a U.S. Security Clearance.