... ASIC) and Field Programmable Gate Array (FPGA) hardware. The HDE analyzes the function of existing ... to assist in the development process by ensuring designs are cost efficient, able to be ...
... ASIC) and Field Programmable Gate Array (FPGA) hardware. The HDE analyzes the function of existing ... to assist in the development process by ensuring designs are cost efficient, able to be ...
Conduct design analysis on components and/or assemblies to assist in the development process by ... Apply ASIC or FPGA place and route (P&R) tools with various libraries to create physical ...
Conduct design analysis on components and/or assemblies to assist in the development process by ... Apply ASIC or FPGA place and route (P&R) tools with various libraries to create physical ...
... hardware development lifecycle-from concept through fabrication and validation. Key ... Design and develop ASIC, FPGA, and SoC-based microelectronic systems * Perform simulation ...
... hardware development lifecycle-from concept through fabrication and validation. Key ... Design and develop ASIC, FPGA, and SoC-based microelectronic systems * Perform simulation ...
Hardware Design Engineer 3
Fort George G Meade, MD · On-site
$110 - $140/hr
... hardware development lifecycle--from concept through fabrication and validation. Key ... Design and develop ASIC, FPGA, and SoC-based microelectronic systems * Perform simulation ...
Hardware Design Engineer 3
Fort George G Meade, MD · On-site
$110 - $140/hr
... hardware development lifecycle--from concept through fabrication and validation. Key ... Design and develop ASIC, FPGA, and SoC-based microelectronic systems * Perform simulation ...
... hardware development lifecycle-from concept through fabrication and validation. Key ... Design and develop ASIC, FPGA, and SoC-based microelectronic systems * Perform simulation ...
... hardware development lifecycle-from concept through fabrication and validation. Key ... Design and develop ASIC, FPGA, and SoC-based microelectronic systems * Perform simulation ...
Apply ASIC or FPGA place and route (P&R) tools with various libraries to create physical ... Professional Development Bonuses for Certificates and Degrees Health Benefits: * Company subsidized ...
Apply ASIC or FPGA place and route (P&R) tools with various libraries to create physical ... Professional Development Bonuses for Certificates and Degrees Health Benefits: * Company subsidized ...
Conduct design analysis on components and/or assemblies to assist in the development process by ... Apply ASIC or FPGA place and route (P&R) tools with various libraries to create physical ...
Conduct design analysis on components and/or assemblies to assist in the development process by ... Apply ASIC or FPGA place and route (P&R) tools with various libraries to create physical ...
Cybersecurity - Hardware Design Engineer - PCB, SMT 7/2/2026 Annapolis Junction, MD
Annapolis, MD · On-site
$225 - $270/hr
Apply ASIC or FPGA place and route (P&R) tools with various libraries to create physical ... Professional Development Bonuses for Certificates and Degrees Health Benefits * Company subsidized ...
New
Cybersecurity - Hardware Design Engineer - PCB, SMT 7/2/2026 Annapolis Junction, MD
Annapolis, MD · On-site
$225 - $270/hr
Apply ASIC or FPGA place and route (P&R) tools with various libraries to create physical ... Professional Development Bonuses for Certificates and Degrees Health Benefits * Company subsidized ...
New
... hardware development lifecycle-from concept through fabrication and validation. Key ... Design and develop ASIC, FPGA, and SoC-based microelectronic systems * Perform simulation ...
... hardware development lifecycle-from concept through fabrication and validation. Key ... Design and develop ASIC, FPGA, and SoC-based microelectronic systems * Perform simulation ...
Conduct design analysis on components and/or assemblies to assist in the development process by ... Apply ASIC or FPGA place and route (P&R) tools with various libraries to create physical ...
Conduct design analysis on components and/or assemblies to assist in the development process by ... Apply ASIC or FPGA place and route (P&R) tools with various libraries to create physical ...
Hardware Design Engineer, Level 3 (2026-0068) with Security Clearance
Annapolis Junction, MD · On-site
$212K - $258K/yr
FPGA/ASIC knowledge required. Will be responsible for investigating COTS software protocols ... We offer competitive compensation, career growth, benefits and learning and development ...
Hardware Design Engineer, Level 3 (2026-0068) with Security Clearance
Annapolis Junction, MD · On-site
$212K - $258K/yr
FPGA/ASIC knowledge required. Will be responsible for investigating COTS software protocols ... We offer competitive compensation, career growth, benefits and learning and development ...
Mid Level Software Engineer [$255K/yr] TS/SCI-FS Poly with Security Clearance
Annapolis Junction, MD · On-site
$255K/yr
Summary: ●Software Engineer on schematics software development team. Qualifications: ● ... ASIC knowledge helpful, but not required. ● Job is investigating COTS software protocols and ...
Mid Level Software Engineer [$255K/yr] TS/SCI-FS Poly with Security Clearance
Annapolis Junction, MD · On-site
$255K/yr
Summary: ●Software Engineer on schematics software development team. Qualifications: ● ... ASIC knowledge helpful, but not required. ● Job is investigating COTS software protocols and ...
Mid Level Software Engineer [$255K/yr] TS/SCI-FS Poly with Security Clearance
Annapolis Junction, MD · On-site
$255K/yr
Summary: ●Software Engineer on schematics software development team. Qualifications: ● ... ASIC knowledge helpful, but not required. ● Job is investigating COTS software protocols and ...
Mid Level Software Engineer [$255K/yr] TS/SCI-FS Poly with Security Clearance
Annapolis Junction, MD · On-site
$255K/yr
Summary: ●Software Engineer on schematics software development team. Qualifications: ● ... ASIC knowledge helpful, but not required. ● Job is investigating COTS software protocols and ...
FPGA/ASIC knowledge required. Will be responsible for investigating COTS software protocols ... We offer competitive compensation, career growth, benefits and learning and development ...
Quick apply
FPGA/ASIC knowledge required. Will be responsible for investigating COTS software protocols ... We offer competitive compensation, career growth, benefits and learning and development ...
Hardware Design Engineer, Level 3 (2026-0068)
Annapolis, MD · On-site
$212K - $258K/yr
FPGA/ASIC knowledge required. Will be responsible for investigating COTS software protocols ... We offer competitive compensation, career growth, benefits and learning and development ...
Hardware Design Engineer, Level 3 (2026-0068)
Annapolis, MD · On-site
$212K - $258K/yr
FPGA/ASIC knowledge required. Will be responsible for investigating COTS software protocols ... We offer competitive compensation, career growth, benefits and learning and development ...
FPGA Hardware Design Engineer
Hanover, MD · On-site
$122K - $168K/yr
Apply ASIC or FPGA place and route (P&R) tools with various libraries to create physical ... Two or more years of experience with test-driven development Salary Range: $200,000 - $330,000 ...
FPGA Hardware Design Engineer
Hanover, MD · On-site
$122K - $168K/yr
Apply ASIC or FPGA place and route (P&R) tools with various libraries to create physical ... Two or more years of experience with test-driven development Salary Range: $200,000 - $330,000 ...
... and assemblies to support development efforts by ensuring designs are cost efficient ... Must have the ability to apply ASIC or FPGA place and route (P&R) tools with various libraries to ...
... and assemblies to support development efforts by ensuring designs are cost efficient ... Must have the ability to apply ASIC or FPGA place and route (P&R) tools with various libraries to ...
Hardware Design Engineer (HDE) - Skill Level 3 with Security Clearance
Annapolis Junction, MD · On-site
... and assemblies to support development efforts by ensuring designs are cost efficient ... Must have the ability to apply ASIC or FPGA place and route (P&R) tools with various libraries to ...
Hardware Design Engineer (HDE) - Skill Level 3 with Security Clearance
Annapolis Junction, MD · On-site
... and assemblies to support development efforts by ensuring designs are cost efficient ... Must have the ability to apply ASIC or FPGA place and route (P&R) tools with various libraries to ...
CNO Software Engineer
Annapolis Junction, MD · On-site
$128K - $176K/yr
Job Summary : Booz Allen Hamilton is seeking a CNO Software Engineer to lead CNO capability ... software development • Experience with Golang • Experience in developing FPGA or ASIC • ...
CNO Software Engineer
Annapolis Junction, MD · On-site
$128K - $176K/yr
Job Summary : Booz Allen Hamilton is seeking a CNO Software Engineer to lead CNO capability ... software development • Experience with Golang • Experience in developing FPGA or ASIC • ...
Manager Digital Engineering 2
Baltimore, MD · On-site
$153K - $230K/yr
An additional critical responsibility is the development and advancement of the FPGA technology ... Knowledge of current digital technologies (FPGA, ASIC, SoC, verification, and/or subsystem)
Manager Digital Engineering 2
Baltimore, MD · On-site
$153K - $230K/yr
An additional critical responsibility is the development and advancement of the FPGA technology ... Knowledge of current digital technologies (FPGA, ASIC, SoC, verification, and/or subsystem)
Asic Development Engineer information
See Baltimore, MD salary details
$48.7K - $58.1K
3% of jobs
$58.1K - $67.6K
4% of jobs
$67.6K - $77K
16% of jobs
$77.9K is the 25th percentile. Wages below this are outliers.
$77K - $86.4K
19% of jobs
The median wage is $89.5K / yr.
$86.4K - $95.9K
24% of jobs
$102.4K is the 75th percentile. Wages above this are outliers.
$95.9K - $105.3K
13% of jobs
$105.3K - $114.8K
6% of jobs
$114.8K - $124.2K
5% of jobs
$124.2K - $133.6K
3% of jobs
$133.6K - $143.1K
5% of jobs
$143.1K - $152.5K
1% of jobs
$48.7K
$95.5K
$152.5K
How much do asic development engineer jobs pay per year?
What is the difference between Asic Development Engineer vs FPGA Design Engineer?
| Aspect | Asic Development Engineer | FPGA Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's or Master's in Electrical Engineering, VLSI, or related fields; knowledge of ASIC design tools | Bachelor's or Master's in Electrical Engineering, Digital Design; familiarity with FPGA development tools |
| Work Environment | Designing and verifying custom silicon chips in semiconductor labs or R&D centers | Developing and testing FPGA-based solutions in hardware labs or embedded systems environments |
| Industry Usage | Used in semiconductor companies, integrated circuit design firms, and tech giants | Common in telecommunications, aerospace, and embedded systems industries |
While both roles involve digital hardware design, Asic Development Engineers focus on creating custom chips for high-performance applications, whereas FPGA Design Engineers work on programmable hardware solutions. Both require strong digital design skills and familiarity with hardware description languages, but their end products and development environments differ.
What does an ASIC Development Engineer do?
Are ASIC Development Engineers in demand?

Full-time
Re-posted 5 days ago
Job description
Markesman Group is seeking Hardware Design Engineer (HDE) candidates to join our team. The HDE designs and tests new integrated circuits and hardware components for a wide variety of signal processing applications and research. They will design, document, and develop code (to include firmware) for digital signal processors or other programmable hardware devices such as Application Specific Integrated Circuit (ASIC) and Field Programmable Gate Array (FPGA) hardware.
The HDE analyzes the function of existing integrated circuits and hardware components for the purpose of reverse engineering the hardware and firmware. Conducts the necessary hardware engineering and related functions to modify and adapt vendor-manufactured hardware to meet special Government needs and contingencies. Capabilities Level 1 Capabilities: Assist with designing new products and processes and improving and maintaining existing products Communicate with the other engineering personnel to coordinate the interrelated design and assure project completion Conduct design analysis on components and/or assemblies to assist in the development process by ensuring designs are cost efficient, able to be manufactured, and reliable Apply ASIC or FPGA place and route (P&R) tools with various libraries to create physical implementations of designs Develop and maintain documentation for the P&R design flows Assist with de-processing electronic components and retrieving stored firmware or software using approved reverse engineering procedures Design new products and processes and improving and maintaining existing products Work with tool and library vendors to develop solutions for designers' P&R design challenges Perform the de-processing of electronic components and retrieving stored firmware or software using approved reverse engineering procedures Integrate new P&R tools, P&R tool updates, and ASIC or FPGA design libraries into Government's computer aided design environment, documents the use of those tools and libraries, and Assist other physical designers to successfully complete their specific P&R design tasks Level 2 Capabilities: Includes all Level 1 capabilities plus: Lead the designs of new products and processes and improve and maintain existing products Provide technical leadership to less experienced engineers Perform the de-processing of electronic components and retrieving stored firmware or software using approved reverse engineering procedures and develops improved procedures Level 3 Capabilities: Includes Level 1 and 2 capabilities plus: Direct and check the work of other hardware design engineers Act as internal consultant providing technical guidance on most complex projects Develop novel procedures for reverse engineering of new component types Oversee the de-processing of electronic components and retrieving stored firmware or software using approved reverse engineering procedures Qualifications Must possess a TS/SCI with Full-Scope Poly Level 1 Qualifications: Three (3) years experience as a HDE in integrated circuit or microelectronic component design or reverse engineering of the same is required.
Bachelor's degree in Electrical Engineering or Computer Engineering from an accredited college or university is required. Five (5) years of additional hardware design engineering experience may be substituted for a bachelor's degree. Level 2 Qualifications: Seven (7) years experience as a HDE in integrated circuit or microelectronic component design or reverse engineering of the same is required.
Bachelor's degree in Electrical Engineering or Computer Engineering from an accredited college or university is required. Five (5) years of additional hardware design engineering experience may be substituted for a bachelor's degree. Level 3 Qualifications: Twelve (12) years experience as a HDE in integrated circuit or microelectronic component design or reverse engineering of the same is required.
Bachelor's degree in Electrical Engineering or Computer Engineering from an accredited college or university is required. Five (5) years of additional hardware design engineering experience may be substituted for a bachelor's degree.
About Markesman Group
Sourced by ZipRecruiter
Industry
Guided missile and space vehicle manufacturing
Company size
51 - 200 Employees
Headquarters location
Newport News, VA, US
Year founded
2014