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Design Verification Engineer Startup Jobs in Baltimore, MD

Grammar LLC

FPGA/ASIC Verification Engineer

Columbia, MD · Hybrid

$110K - $200K/yr

FPGA/ASIC Verification Engineer Job Schedule: 9/80: Employees work 9 out of every 14 days ... Perform FPGA design verification and validation of embedded electronic communication. Assist in ...

L3HHCM20

FPGA/ASIC Verification Engineer 1

Columbia, MD · Hybrid

$106.50K - $197.50K/yr

Senior Specialist, Electrical Engineer - FPGA/ASIC Verification Engineer Job Code: 37168 Job ... Perfrom FPGA design verification and validation of embedded electronic communication. * Assist in ...

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How much do design verification engineer startup jobs pay per year?

As of May 28, 2026, the average yearly pay for design verification engineer startup in Baltimore, MD is $148,201.00, according to ZipRecruiter salary data. Most workers in this role earn between $135,100.00 and $164,900.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Design Verification Engineer at a startup, and why are they important?

To thrive as a Design Verification Engineer at a startup, you need a strong background in digital design, verification methodologies, and a relevant degree in electrical engineering or computer science. Familiarity with tools like SystemVerilog, UVM, simulation environments, and version control systems is typically required, along with experience in scripting languages. Strong problem-solving abilities, adaptability, and effective communication are crucial soft skills, especially in fast-paced startup environments. These skills ensure efficient bug detection, robust product development, and successful collaboration within small, agile teams.

What unique challenges might a Design Verification Engineer face when working at a startup compared to a larger company?

At a startup, Design Verification Engineers often work with smaller teams and less established processes, which means you'll likely take on a broader range of responsibilities—from testbench development to hands-on debugging and even influencing verification methodologies. The fast-paced environment can present challenges such as tighter deadlines, limited resources, and rapidly changing project scopes. However, this setting also allows for closer collaboration with design, software, and product teams, fostering a greater sense of ownership and quicker decision-making. Your contributions are highly visible, and there's significant potential for accelerated career growth as the company scales.

What does a Design Verification Engineer do at a startup?

A Design Verification Engineer at a startup is responsible for ensuring that hardware designs, such as integrated circuits or systems-on-chip, function as intended before they are manufactured. This typically involves developing and running simulations, creating testbenches, writing verification plans, and identifying bugs or mismatches in the design. In a startup environment, Design Verification Engineers often work closely with design, software, and product teams, and may need to wear multiple hats due to limited resources. Their work is crucial in reducing costly errors and speeding up the development cycle, helping the company deliver reliable products to market quickly.

What is the difference between Design Verification Engineer Startup vs Design Verification Engineer Large Corporation?

AspectDesign Verification Engineer StartupDesign Verification Engineer Large Corporation
CredentialsBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields; certifications like Certified Verification Engineer are commonSame as startup; often similar certifications and educational background
Work EnvironmentAgile, fast-paced, collaborative teams with flexible processesStructured, process-driven, with formal verification methodologies and documentation
Employer & Industry UsageStartups in semiconductor, electronics, or tech sectors; emphasis on innovationLarge tech, semiconductor, or electronics companies with established verification teams
Search & Comparison IntentUnderstanding role differences in startup vs large company

Both roles require similar technical skills and educational backgrounds. The main differences lie in work environment and processes, with startups being more flexible and fast-paced, while large corporations follow formal verification procedures. Candidates should consider their preferred work style when comparing these roles.

What are popular job titles related to Design Verification Engineer Startup jobs in Baltimore, MD? For Design Verification Engineer Startup jobs in Baltimore, MD, the most frequently searched job titles are:
What job categories do people searching Design Verification Engineer Startup jobs in Baltimore, MD look for? The top searched job categories for Design Verification Engineer Startup jobs in Baltimore, MD are:
Design Verification Engineer Startup jobs near you
FPGA/ASIC Verification Engineer

FPGA/ASIC Verification Engineer

Grammar LLC

Columbia, MD • Hybrid

$110K - $200K/yr

Full-time

Medical, Retirement, PTO

This job post has expired today. Applications are no longer accepted.

Job description

Role: FPGA/ASIC Verification Engineer 
Job Schedule: 9/80: Employees work 9 out of every 14 days – totaling 80 hours worked – and have every other Friday off OR 5/8: Employees work 8 hours per day, 5 days a week

Job Description:

Join our team at the company and play a critical role in developing secure, cutting-edge tactical communication systems that protect those who protect us. As an FPGA Verification Engineer, you’ll collaborate with a talented, mission-driven team, verifying next-generation FPGA solutions for our radios used by military and first responders worldwide. This is a hands-on opportunity to grow your expertise in UVM, advanced verification methodologies, and complex communication systems—while enjoying work-life balance with flexible schedules and every other Friday off.

You will function primarily in an FPGA verification role, working in a cooperative team environment to verify and test embedded FPGA firmware for radio communication systems. We're seeking familiarity with a coverage-driven verification methodology from planning through closure as well as knowledge of industry standard interfaces. You will be required to analyze requirements, create test specifications/plans, write tests in System Verilog within a UVM test bench framework, and verify designs meet requirements. You will work with cross functional teams to verify FPGA designs for radio product development projects.

Essential Functions:

Perform FPGA design verification and validation of embedded electronic communication.

Assist in development of high-level and detailed verification test plans consistent with system requirements and specifications.

Develop self-checking test benches for FPGA design verification and validation using System Verilog.

Develop Agents, Test sequences, Cover groups, Predictors, Scoreboards.

Develop randomized and directed tests to achieve closure on functional coverage and provide feedback to team to reach functional coverage goals.

Develop high-level and detailed verification test plans and test benches consistent with system requirements and specifications.

Work with cross functional teams as needed to define and verify product and design requirements.

Prepare design and implementation reviews. Present technical briefings and status to internal and external customers.

Ability to obtain and maintain US Security Clearance.

Qualifications:

Bachelor’s Degree and minimum 6 years of prior relevant experience. Graduate Degree and a minimum of 4 years of prior related experience. In lieu of a degree, minimum of 10 years of prior related experience.

Experience developing and verifying FPGA/ASIC based embedded system solutions.

Preferred Additional Skills:

Demonstrated ability to analyze and debug FPGA firmware and related hardware issues.

Working knowledge of Ethernet Standard and design experience related to Ethernet packet processing.

Experience with cryptographic algorithms and cryptographic solutions for embedded communication systems.

Experience with Mentor Graphics Verification tools.

FPGA/ASIC RTL Design experience.

Proficiency in Object Oriented Programming (C++, JAVA).

Proven proficiency in FPGA/ASIC verification using System Verilog.

Working knowledge of UVM/OVM methodology.

Experience with Advanced Functional Verification tools to report functional coverage.

Experience with scripting languages (Bash, Perl, Python, Tcl).

Familiarity in working within Linux OS.

Familiarity with industry standard interfaces (Ethernet, AXI, SPI).

Solid technical writing skills and ability to communicate complex technical concepts/solutions both inside and outside of the organization.

Highly motivated, self-starter, who works well in team environments.

In compliance with pay transparency requirements, the salary range for this role in New York State is $90,500-$168,500.  The salary range for this role in Maryland is $106,500 - $197,500.  This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. Our company also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements.