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Ai Chip Design Rtl Jobs in Baltimore, MD (NOW HIRING)

Wyetech

Hardware/Software Design Engineer 3

Annapolis, MD · On-site

$73.94 - $100.13/hr

This role combines hardware design responsibilities (FPGA RTL development, timing closure, resource ... We may use artificial intelligence (AI) tools to support parts of the hiring process, such as ...

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All JobsAi Chip Design Rtl JobsAi Chip Design Rtl Jobs in Baltimore, MD

Ai Chip Design Rtl information

See Baltimore, MD salary details

$80K

$138.5K

$181.3K

How much do ai chip design rtl jobs pay per year?

As of Jul 27, 2026, the average yearly pay for ai chip design rtl in Baltimore, MD is $138,481.00, according to ZipRecruiter salary data. Most workers in this role earn between $135,100.00 and $135,100.00 per year, depending on experience, location, and employer.

What is a $900000 AI job?

A $900,000 AI job typically refers to a high-level position in artificial intelligence, such as senior AI researcher, machine learning engineer, or AI architect, often requiring advanced skills in deep learning, neural networks, and hardware design like RTL for AI chips. Such roles usually involve leadership, extensive experience, and may include stock options or bonuses, with compensation reflecting expertise and impact on AI hardware development.

What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?

AspectAi Chip Design RtlAi Chip Verification Engineer
Primary FocusDeveloping and implementing Register Transfer Level (RTL) code for AI chipsVerifying and validating RTL designs to ensure functionality
Skills RequiredHDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledgeSimulation, testbench creation, debugging, scripting skills
Work EnvironmentDesign teams, hardware development labs, EDA toolsVerification teams, simulation environments, test setups
CertificationsHardware design certifications, FPGA/ASIC trainingVerification methodologies, UVM, SystemVerilog certifications

While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.

Will AI replace RTL designers?

AI chip design RTL (Register Transfer Level) development involves creating hardware descriptions that require expert knowledge of digital logic and hardware architecture. While AI tools can assist in automating certain tasks like code generation and verification, they are unlikely to fully replace RTL designers, as human expertise is essential for complex decision-making, optimization, and ensuring design correctness. RTL designers will continue to play a critical role in the chip design process, often working alongside AI-assisted tools to improve efficiency and innovation.

What are some common challenges faced by AI Chip Design RTL engineers during the verification process?

AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.

Which 3 jobs will survive AI?

AI Chip Design RTL professionals are likely to continue in demand due to the specialized technical skills required for hardware description languages like Verilog and VHDL, which are less easily automated. Jobs involving complex problem-solving, system integration, and hardware-software interface design, such as hardware engineers, system architects, and verification engineers, are also expected to persist. These roles require domain expertise and critical thinking that complement AI automation capabilities.

What are AI Chip Design RTL engineers?

AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.

What is the salary of RTL design?

The salary for an RTL (Register Transfer Level) design engineer typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Entry-level positions may start lower, while experienced engineers with specialized skills in hardware description languages like VHDL or Verilog can earn higher salaries.

What are the key skills and qualifications needed to thrive as an AI Chip Design RTL Engineer, and why are they important?

To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.
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Ai Chip Design Rtl jobs near you
Infographic showing various Ai Chip Design Rtl job openings in Baltimore, MD as of July 2026, with employment types broken down into 74% Full Time, 22% Part Time, and 4% Contract. Highlights an 71% Physical, 3% Hybrid, and 26% Remote job distribution, with an average salary of $138,481 per year, or $66.6 per hour.
Senior ASIC Digital Design Engineer

Senior ASIC Digital Design Engineer

General Dynamics Mission Systems, Inc

Annapolis Junction, MD • Hybrid

$142K - $150K/yr

Full-time

Posted 14 days ago

General Dynamics Mission Systems rating

7.9

Company rating: 7.9 out of 10

Based on 30 frontline employees who took The Breakroom Quiz

128th of 245 rated software companies

Job description

Education Requirements:

Requires a Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering, Technology or Mathematics field. Also requires 5+ years of job-related experience, or a Master's degree plus 3 years of job-related experience.  

Clearance Requirements:

Ability to obtain a Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.


Knowledge, Skills and Abilities:

What You’ll Get to Do:

  • Lead a team of digital design engineers to create a security system on a chip.
  • Collaborate with team members and across teams to explore and clearly identify real problems and solutions.
  • Develop and define the microarchitecture of new IP to optimize performance, I/O, power consumption, area utilization, recurring cost and security functions.
  • Implement and simulate IP blocks in RTL using SystemVerilog, VHDL, and other languages.
  • Integrate complex systems that instantiate both the organization's and third party IP.
  • Contribute to all aspects of design success from specification to production.
  • Apply our state-of-the-art IP to ASIC and FPGA products in the real world.
  • Define and improve high-quality design methods and processes.
  • Mentor and guide other ASIC design engineers.
  • Identifies opportunities to apply AI for continuous improvement and innovation.

Knowledge, Skills and Abilities:

  • Solid technical background with at least 5 years of experience in FPGA or ASIC product development
  • Team leadership experience.
  • Ability to communicate clearly in person and in written documentation
  • Degree in Computer Engineering, Computer Science, Electrical Engineering or related field
  • In-depth knowledge and experience with digital architectures and design methods such as RTL coding, synthesis, place-and-route, timing closure, constrained-random and formal verification
  • Strong analytical and problem solving skills
  • Extreme attention to detail
  • A willingness to roll up one’s sleeves to get the job done
  • Skilled at working effectively with cross functional teams

#LI-Hybrid


This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled.
USD $142,166.00 - USD $150,000.00 /Yr.

General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!


Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans

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