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Junior Rtl Design Engineer Jobs in Baltimore, MD

Next Step Systems

DSP/FEC Engineer

Linthicum, MD · On-site

$141K - $164K/yr

DSP/FEC Engineer, Linthicum Heights, MD We are looking for multiple DSP/FEC Engineer candidates at ... Preferred Qualifications: - Familiarity with FPGA and RTL design including hardware description ...

Next Step Systems

DSP Communications Engineer

Linthicum, MD · On-site

$141K - $164K/yr

Minimum Qualifications: - Familiarity with FPGA and RTL design including hardware description languages (Verilog, System Verilog, VHDL). - Good knowledge and understanding across various engineering ...

Next Step Systems

FPGA Electrical Engineer

Linthicum, MD · On-site

... design within ASIC/FPGA, create specification documents. - Develop RTL designs using SystemVerilog, with emphasis on DSP and digital communication system blocks (frontend, physical layer, link layer ...

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Junior Rtl Design Engineer information

See Baltimore, MD salary details

$33.3K

$71.3K

$108.8K

How much do junior rtl design engineer jobs pay per year?

As of Aug 2, 2026, the average yearly pay for junior rtl design engineer in Baltimore, MD is $71,343.00, according to ZipRecruiter salary data. Most workers in this role earn between $48,200.00 and $79,500.00 per year, depending on experience, location, and employer.

What engineers make $300,000 a year?

Senior engineers in specialized fields such as software engineering, petroleum engineering, and certain electrical or aerospace engineering roles can earn $300,000 or more annually, especially with extensive experience, advanced skills, and leadership responsibilities. High-level positions often require advanced degrees, certifications, and a strong track record of project management or technical expertise.

What is the salary of RTL design engineer?

The salary of a Junior RTL Design Engineer typically ranges from $70,000 to $100,000 annually, depending on experience, location, and company size. Entry-level positions may start lower, while experienced engineers with skills in Verilog, VHDL, and FPGA design can earn higher salaries.

What are the key skills and qualifications needed to thrive as a Junior RTL Design Engineer, and why are they important?

To thrive as a Junior RTL Design Engineer, a solid background in digital logic design, hardware description languages (such as Verilog or VHDL), and a relevant engineering degree are essential. Experience with simulation and synthesis tools (like ModelSim, Synopsys, or Xilinx Vivado) and a basic understanding of ASIC or FPGA flows are typically required. Strong analytical thinking, attention to detail, and effective teamwork skills help individuals excel in translating specifications into efficient hardware designs. These skills ensure accurate, reliable, and high-performance digital circuit development, which is crucial for meeting project goals and industry standards.

What engineers make $200,000 a year?

Senior engineers in fields such as software engineering, petroleum engineering, and certain specialized roles in finance or management can earn $200,000 or more annually. Achieving this level typically requires extensive experience, advanced skills, and often leadership responsibilities or specialized certifications.

What are Junior RTL Design Engineers?

Junior RTL Design Engineers are entry-level professionals who work on designing and verifying the Register Transfer Level (RTL) logic for digital integrated circuits. They typically use hardware description languages like Verilog or VHDL to describe and simulate the functionality of hardware blocks according to specifications. Their responsibilities often include coding, simulation, debugging, and collaborating with senior engineers to ensure the design meets performance and functional requirements. This role is crucial in the process of creating chips and digital systems used in various electronic devices.

What is the difference between Junior Rtl Design Engineer vs Digital Design Engineer?

AspectJunior Rtl Design EngineerDigital Design Engineer
Required CredentialsBachelor's in Electrical Engineering or related field; some certificationsBachelor's or higher in Electrical/Electronic Engineering; certifications vary
Work EnvironmentDesign teams in semiconductor or electronics companiesDesign and development teams in similar industries
Employer & Industry UsageCommonly employed in chip design, FPGA, ASIC developmentUsed in digital circuit and system design across industries

Both roles involve digital circuit design, but Junior Rtl Design Engineers focus more on RTL coding and verification, while Digital Design Engineers may handle broader digital system development. The roles often overlap in skills and work environment, with the main difference being scope and experience level.

What are some common challenges faced by Junior RTL Design Engineers when transitioning from academic projects to industry roles?

Junior RTL Design Engineers often find the transition from academic projects to industry roles challenging due to the increased complexity and scale of commercial designs. In industry, there is a strong emphasis on meeting strict timing, power, and area requirements, as well as adhering to rigorous verification and documentation standards. Collaboration with verification, physical design, and software teams is essential, and juniors may need to quickly adapt to using industry-standard EDA tools and workflows. Gaining proficiency in debugging and understanding legacy codebases are also typical hurdles. However, most teams provide mentorship and structured onboarding to help new engineers succeed.

What engineer makes $500,000 a year?

Senior engineers in specialized fields such as software engineering, data science, or executive engineering roles can earn $500,000 or more annually, especially with experience, advanced skills, and leadership responsibilities. High compensation often includes bonuses, stock options, or profit sharing, particularly in large tech companies or startups.
What are popular job titles related to Junior Rtl Design Engineer jobs in Baltimore, MD? For Junior Rtl Design Engineer jobs in Baltimore, MD, the most frequently searched job titles are:
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Junior Rtl Design Engineer jobs near you

Senior ASIC Digital Design Engineer

General Dynamics Mission Systems, Inc

Annapolis Junction, MD • On-site

Full-time

Re-posted 20 days ago

General Dynamics Mission Systems rating

7.9

Company rating: 7.9 out of 10

Based on 30 frontline employees who took The Breakroom Quiz

127th of 241 rated software companies

Job description

Education Requirements:

Requires a Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering, Technology or Mathematics field. Also requires 5+ years of job-related experience, or a Master's degree plus 3 years of job-related experience.  

Clearance Requirements:

Ability to obtain a Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.


We're looking for an Advanced ASIC Design Engineer with solid hands-on experience in RTL design and a foundational understanding of the full ASIC/FPGA design lifecycle. This is a technical role for someone who is ready to take on meaningful ownership of design tasks within a collaborative, high-performing team.

If your career has been primarily running P&R tools, this probably isn't the right fit. We also need someone who has moved beyond the "burn it and see if it works" model of FPGA development — on ASIC, you don't get that luxury. We need an RTL designer who understands that correctness has to be established through rigorous simulation, formal verification, and independent review long before anything gets near silicon.

The right candidate has worked in larger, structured design environments where verification is a discipline in its own right — with dedicated verification partners, formal review processes, and clear functional closure criteria. A self-starter who can work independently on assigned tasks, drives progress without constant direction, and brings a problem-solving mindset to everything they touch.

What You'll Do

  - Own RTL design tasks — Develop RTL with a focus on correctness: bus fabric integrity, clock domain crossings, reset order-of-operations, and design-for-verification

  - Contribute to timing closure — Work through synthesis, place and route, and static timing analysis; identify root causes of timing failures and contribute to fixes

  - Support verification efforts — Execute test and simulation plans in coordination with a dedicated verification team; understand and work within a formal verification process; verify results and help drive closure on failures

  - Participate in JIRA triage — Review incoming issues and help maintain an accurate and actionable backlog

  - Participate in code reviews — Engage in RTL code reviews, providing and receiving constructive technical feedback

  - Support program planning — Provide input on task status, schedule risk, and level of effort to support IMS and EV reporting

  - Support proposals — Contribute to basis of estimates (BOEs) for proposals, providing technical input on scope and level of effort for assigned design tasks

  - Support technology evaluation — Assist in assessing foundry technologies, device libraries, IP cores, and EDA tooling

  - Collaborate broadly — Participate in Integrated Product Teams and working groups

What We're Looking For

  - 5–8+ years of ASIC/FPGA design experience, with meaningful time spent as an RTL designer

  - Experience working in larger, structured design teams with formal verification processes and independent verification partners — not solely in small-team or solo development environments

  - Demonstrated understanding that design correctness is established through simulation, formal verification, and peer review — not through iteration on hardware

  - Some experience contributing to ASIC tape-out efforts is a plus

  - Familiarity with FinFET process nodes (7nm, 5nm, or similar) is a differentiator

  - Familiarity with commercial foundry flows (TSMC, GlobalFoundries, Samsung, or equivalent)

  - Working knowledge of:

    - RTL design and microarchitecture

    - Bus fabric design and verification

    - Clock domain crossing (CDC) analysis

    - Reset sequencing and validation

    - Timing closure fundamentals

    - Power analysis basics

Skills & Knowledge

  - Solid understanding of ASIC/FPGA engineering concepts, RTL coding practices, and synthesis flows

  - Familiarity with industry-standard EDA tools (synthesis, simulation, formal verification, STA)

  - Ability to work independently on assigned tasks while coordinating effectively within the team

  - Familiarity with vendor and foundry capabilities

  - Proficiency in JIRA for issue tracking and backlog management

  - Proficiency in Microsoft Office for documentation and communication

Why This Role

You won't be handed a spec and told to code. You'll take real ownership of design tasks, with exposure across the full ASIC lifecycle and the opportunity to grow alongside experienced engineers. This is a role where your work matters, your initiative is recognized, and the team values engineers who take ownership and see problems through to resolution.


This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled.
USD $142,166.00 - USD $150,000.00 /Yr.

General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!


Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans

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