Asic Design Engineering Intern Jobs (NOW HIRING)

At Cornelis we're building the future of AI and HPC networking with an AI-first approach to silicon and software development. We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale.

Cornelis Networks delivers the world's highest performance scale-out networking solutions for AI and HPC datacenters. Our differentiated architecture seamlessly integrates hardware, software and system level technologies to maximize the efficiency of GPU, CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI & HPC workloads, empowering our customers to push the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to innovation, performance and scalability - solving the world's most demanding computational challenges with our next-generation networking solutions.

We are a fast-growing, forward-thinking team of architects, engineers, and business professionals with a proven track record of building successful products and companies. As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles.

Cornelis Networks islooking for aSenior ASIC Design Engineering Managerto lead and grow our RTL design engineering team.Reporting to the VP of ASIC Engineering,with direct exposure toexecutive leadership,this leaderwillmanagea team of talented design engineers anddrivefull-lifecycle development ofCornelis'next-generation, high-performance networking ASICs.The role isaccountable forbuilding and driving RTLimplementationschedules acrossallSoC subsystemsand full-chipmilestones. Successrequiresdeep hands-onexpertisein advanced RTL designimplementation,methodologies,and SoC flows,from microarchitecturedefinitionthroughRTL delivery,tape-outreadiness, andcross-functionalexecutionwith Architecture, DesignVerification, Emulation,andPhysical Design.This leaderwill alsoownheadcount planning,hiring,and organizationalstrategyto build animble, efficient,world-classdesign team.Exposureto AI-based design flowsandmethodologyispreferred.

This role isintendedfor a senior engineering leader who can combine hands-on ASIC RTL designexpertisewith disciplined program execution, cross-functional coordination, andteam buildingat scale.

Key Responsibilities

• OwnASIC RTL delivery schedules across major milestonesbytracking,monitoring,and reportingprogress against committedplans.

• Utilize data-driven insights to predictschedulerisks and proactively reallocate human resources to keep the project on track.

• AlignRTL delivery scheduleswith DV andemulationenablement andmanagefeedbackloopsand dependencies efficiently.

• Facilitatephysical designhandoffsbyensuringdesign teams provide high-quality RTL and constraintsthatminimize timing-closure iterations. Track physical design feedback anddelivery schedules to support physical designsignoff and tape-out milestones.

• Leadlong-term headcount planning and organizationaldesignfor the ASIC department.Identifyskill gaps and executeglobal talent acquisition strategiesthat support theproduct roadmap.
  

MinimumQualifications

• 15+ years in the semiconductor industry,preferably inhigh performancedesigns on advanced technology nodes,with at least5years in people management

• B.S. or M.S. in Computer Engineering, Electrical Engineering, or related technical field, or equivalent practical experience

• Deep understanding of the interaction between Design, Verification, Emulation, and Physical Design teams. You must know "how the work gets done" to manage the people doing it.

• Proven ability to lead largeengineering organizations through multiple full-cycle ASIC product launchesin a remoteenvironment.Ability to coordinate across multiple projects, manage risks and escalations, and work under tight schedules and budget constraints.

• Strong technicalexpertisein microarchitecture development, RTL coding (Verilog/SystemVerilog), synthesis, STA/timing closure, physical design, and verification methodologies.

• Exposuretoone or more industry standards/protocol stacks such as PCIe, Ethernet, UCIe,UALink.

• Demonstrated ability tooptimizedesigns for PPA (power, performance, area) and to integrate major subsystems (interconnect, I/O, memory).
  

Preferred Qualifications

• Exposure to AI based design implementation and verification flows, scripting for automation, milestonetrackingand flow integration

• Experience building globally distributed ASIC design teams and scaling engineering practicesin a remote environment.

Location:This is a remote position for employees residing within the United States.

We offer a competitive compensation package that includes equity, cash, and incentives, along with health and retirement benefits. Our dynamic, flexible work environment provides the opportunity to collaborate with some of the most influential names in the semiconductor industry.

At Cornelis Networks your base salary is only one component of your comprehensive total rewards package. Your base pay will be determined by factors such as your skills, qualifications, experience, and location relative to the hiring range for the position. Depending on your role, you may also be eligible for performance-based incentives, including an annual bonus or sales incentives.

In addition to your base pay, you'll have access to a broad range of benefits, including medical, dental, and vision coverage, as well as disability and life insurance, a dependent care flexible spending account, accidental injury insurance, and pet insurance. We also offer generous paid holidays, 401(k) with company match, and Open Time Off (OTO) for regular full-time exempt employees. Other paid time off benefits include sick time, bonding leave, and pregnancy disability leave.

Cornelis Networks does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. Cornelis Networks is an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.