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Asic Development Intern Jobs (NOW HIRING)

Jane Street

Hardware Engineer (FPGA/ASIC)

New York, NY · On-site

As an intern, you are paired with full-time employees who act as mentors, collaborating with you on ... Hardcaml is tightly integrated into our development environment, so you'll also gain lots of ...

NXP Semiconductors

SOC DFT Intern - Spring 2027

Austin, TX

$14.75 - $19.75/hr

As a DFT Intern, you will work closely with experienced engineers to support the development and ... Exposure to the full ASIC design and test cycle. * Opportunity to contribute to real silicon ...

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How much do asic development intern jobs pay per hour?

As of Sep 11, 2026, the average hourly pay for asic development intern in the United States is $17.04, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $19.23 per hour, depending on experience, location, and employer.

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Infographic showing various Asic Development Intern job openings in the United States as of August 2026, with employment types broken down into 1% As Needed, 82% Full Time, 14% Part Time, and 3% Contract. Highlights an 91% Physical, 3% Hybrid, and 6% Remote job distribution, with an average salary of $35,436 per year, or $17 per hour.

US 2026 Hardware - Digital Intern

San Jose, CA • On-site

TetraMem - Accelerate The World
Computer and Peripheral Equipment Manufacturing • 11 - 50 employees
Learn more about TetraMem - Accelerate The Worldexternal

$35 - $45/hr

Full-time, Internship

Re-posted 2 days ago

Job description

About the Role
We are seeking a Digital Hardware Intern to support the design, verification, and integration of digital systems in TetraMems AI accelerators. Youll contribute to RTL design, simulations, and performance optimization for real-world AI computing applications.


Responsibilities
Support RTL design using Verilog or SystemVerilog
Assist in writing testbenches and performing functional verification
Collaborate with digital and software teams to integrate and validate system components
Contribute to timing analysis, synthesis, and performance analysis


Qualifications
Currently pursuing a degree in Electrical Engineering, Computer Engineering, or related field
Familiarity with Verilog/SystemVerilog and digital design fundamentals Exposure to simulation tools (e.g., ModelSim, VCS) and scripting (Python, Shell, or Tcl)
Understanding of SoC or ASIC development flow is a plus
Team-oriented with strong communication and documentation skills

Salary Range: $35-45 USD/hr

TetraMem celebrates diversity and is committed to creating an inclusive environment for all employees. We are proud to be an Equal Opportunity Employer and welcome applicants from all backgrounds. Qualified candidates will receive consideration for employment without regard to race, color, religion, creed, sex, gender identity or expression, sexual orientation, national origin, ancestry, age, marital status, medical condition, disability, genetic information, military or veteran status, or any other characteristic protected by applicable federal, state, or local law.
TetraMem is committed to providing reasonable accommodations to qualified applicants with disabilities throughout the recruitment process. Applicants requiring accommodation may contact Human Resources for assistance.
To ensure a fair, consistent, and efficient hiring process, all candidates must apply through TetraMems official ClearCompany Applicant Tracking System (ATS). Applications submitted through the ATS allow our hiring team to evaluate candidates using a standardized process and ensure timely communication throughout the recruitment process. To promote equal consideration for all applicants, applications submitted outside of the ClearCompany ATS, including direct emails, LinkedIn messages, or unsolicited submissions to employees, may not be reviewed or considered.
We encourage all interested candidates to apply through the official TetraMem Careers page.

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