ZipRecruiter

Log In

1

Asic Design Engineer Jobs in Portland, OR (NOW HIRING)

Sonsoft Inc

SoC Design and Verification

Hillsboro, OR

$148K - $180K/yr

Knowledge of ASIC design methodologies and flows. * Ability to Manage and conduct training for the team. * Worked with companies and seen at least a couple of tape-outs * Project management ...

Intel

Mixed Signal Logic Design Engineer

Hillsboro, OR · On-site

Position Overview Develops the logic design, register transfer level (RTL) coding, and simulation ... Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom ...

Sonsoft Inc

SoC Design and Verification

Hillsboro, OR

$148K - $180K/yr

Knowledge of ASIC design methodologies and flows * Ability to Manage and conduct training for the team * Worked with companies and seen at least a couple of tape-outs * Project management ...

previous page

Showing results 41-60

All JobsAsic Design Engineer JobsAsic Design Engineer Jobs in Portland, OR

Asic Design Engineer information

See Portland, OR salary details

$99.7K

$159.3K

$214.2K

How much do asic design engineer jobs pay per year?

As of Aug 9, 2026, the average yearly pay for asic design engineer in Portland, OR is $159,283.00, according to ZipRecruiter salary data. Most workers in this role earn between $139,500.00 and $190,900.00 per year, depending on experience, location, and employer.

What is the difference between Asic Design Engineer vs FPGA Design Engineer?

AspectAsic Design EngineerFPGA Design Engineer
CredentialsBachelor's/Master's in Electrical Engineering or Computer EngineeringBachelor's/Master's in Electrical Engineering or Computer Engineering
Work EnvironmentDesigning custom chips for manufacturingDeveloping programmable logic designs for prototyping and deployment
Industry UsageSemiconductor companies, consumer electronics, automotivePrototyping, testing, and specialized hardware applications

Both roles require similar educational backgrounds and often overlap in skills like HDL programming. However, Asic Design Engineers focus on creating chips for mass production, while FPGA Design Engineers work on flexible, reprogrammable hardware for testing and specific applications.

How much does an ASIC design engineer make?

An ASIC design engineer's salary typically ranges from $80,000 to $150,000 annually, depending on experience, location, and industry. Senior engineers with specialized skills in hardware description languages and verification tools can earn higher compensation, often exceeding $180,000.

What are some common challenges faced by ASIC design engineers during the design and verification phases?

ASIC Design Engineers often encounter challenges such as meeting strict performance and power constraints while ensuring that the design remains within budget and time limits. Debugging complex logic errors during simulation and verification can be particularly demanding, as small mistakes can have significant downstream effects. Additionally, effective communication with cross-functional teams—including software, hardware, and validation engineers—is essential to resolve integration issues and meet project milestones. Adapting to rapidly evolving tools and technologies is also a key part of the role.

Are ASIC design engineers in demand?

ASIC design engineers are in high demand due to the growth of semiconductor technology, consumer electronics, and data centers. Skills in hardware description languages like VHDL or Verilog, along with experience in FPGA and ASIC development, are highly valued in the industry.

What are the key skills and qualifications needed to thrive as an ASIC design engineer, and why are they important?

To thrive as an ASIC Design Engineer, you need a solid background in electrical engineering, digital logic design, and proficiency with hardware description languages like Verilog or VHDL, usually backed by a relevant degree. Familiarity with EDA tools such as Synopsys or Cadence and knowledge of simulation and verification methodologies are typically required. Strong problem-solving abilities, attention to detail, and effective teamwork set outstanding engineers apart in this role. These skills and qualities are vital for delivering complex, high-performance integrated circuits that meet strict specifications and project deadlines.

What is an ASIC design engineer?

ASIC Design Engineers are professionals who design and develop Application-Specific Integrated Circuits (ASICs), which are custom-built semiconductor chips tailored for specific applications or products. They are responsible for the entire design process, including architecture definition, logic design, verification, synthesis, and sometimes physical layout. Their work is crucial in industries like consumer electronics, telecommunications, automotive, and more, ensuring that devices have optimized performance, power efficiency, and functionality for their intended uses.

What does an ASIC design engineer do?

An application specific integrated circuit (ASIC) is an electronic circuit created for a specific purpose, rather than for general use. ASIC design engineers create product design specification (PDS) statements for ASIC, optimize logic design, and create architectural design models. ASIC design engineers often work on a team to deliver ASIC design solutions for standard and complex computing. Knowledge of computer-aided design (CAD) tools, logic simulation, Verilog, and other hardware description languages (HDLs) is integral to career success.

More about Asic Design Engineer jobs
What are the most commonly searched types of Asic Design Engineer jobs in Portland, OR? The most popular types of Asic Design Engineer jobs in Portland, OR are:
What are popular job titles related to Asic Design Engineer jobs in Portland, OR? For Asic Design Engineer jobs in Portland, OR, the most frequently searched job titles are:
What job categories do people searching Asic Design Engineer jobs in Portland, OR look for? The top searched job categories for Asic Design Engineer jobs in Portland, OR are:
What cities near Portland, OR are hiring for Asic Design Engineer jobs? Cities near Portland, OR with the most Asic Design Engineer job openings:
Asic Design Engineer jobs near you
Infographic showing various Asic Design Engineer job openings in Portland, OR as of August 2026, with employment types broken down into 1% Internship, 84% Full Time, 11% Part Time, and 4% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $159,283 per year, or $76.6 per hour.

Integrated Circuit Design Verification Engineer

Snapchat

Vancouver, WA • On-site

$142K - $173K/yr

Full-time

Medical

Re-posted 4 days ago

Job description

Snap Inc is a technology company. We believe the camera presents the greatest opportunity to improve the way people live and communicate. Snap contributes to human progress by empowering people to express themselves, live in the moment, learn about the world, and have fun together.
The Company operates Snapchat, a visual messaging app that enhances your relationships with friends, family, and the world, and Specs Inc., a wholly-owned subsidiary dedicated to making computing more human, in addition to Bitmoji, Saturn, and other digital services.
Specs Inc. is a wholly-owned subsidiary of Snap Inc. dedicated to making computing more human. The company develops Specs, advanced eyewear that seamlessly integrates digital experiences into the physical world.
Specs feature see-through lenses that place digital objects directly into three-dimensional space, powered by Snap OS, a proprietary, context-aware operating system designed for natural interaction with your hands and voice.
Specs Inc. also provides Lens Studio, a full suite of advanced developer tools that powers immersive augmented reality experiences across Specs, Snapchat, and other services.
We're looking for a Integrated Circuit Design Verification Engineer to join the Spectacles Team at Snap Inc!
What you'll do:
  • Work as part of a multi-disciplinary team designing display Integrated Circuits for AR
  • Work closely with digital design, analog logic, software and verification engineers
  • Develop and implement UVM-based and assertion-based testbenches
  • Create and execute verification test plans, including functional coverage and code coverage
  • Utilize Siemens Questa tool set for verification and debug tasks
  • Specify and configure tools and create automation

Knowledge, Skills & Abilities:
  • Strong knowledge of UVM and SystemVerilog for advanced verification methodologies
  • Strong knowledge of digital functional simulation, and tools such as Siemens Questa
  • Strong knowledge of good Verilog RTL coding practices
  • Scripting and automation, such as TCL, Make, Perl, Python and Shell scripts in Linux environment
  • Excellent written and verbal English communication

Minimum Qualifications:
  • BSEE or MSEE or relevant years of experience
  • 10+ years of experience in ASIC Design Verification

Preferred Qualifications:
  • Experience with entire verification process from planning to sign-off
  • Experience with Siemens' UVM Framework
  • Experience in emulation
  • Experience in RTL design
  • Familiarity with video and display systems, MIPI, AMBA, I2C, SPI protocols and embedded microcontroller
  • Familiarity with ASIC test or production flow
  • Ideal candidate is a self-starter, can organise complex issues and drive them to closure
  • Able to multitask and prioritise.

If you have a disability or special need that requires accommodation, please don't be shy and provide us some information.
"Default Together" Policy at Snap: At Snap Inc. we believe that being together in person helps us build our culture faster, reinforce our values, and serve our community, customers and partners better through dynamic collaboration. To reflect this, we practice a "default together" approach and expect our team members to work in an office 4+ days per week.
At Snap, we believe that having a team of diverse backgrounds and voices working together will enable us to create innovative products that improve the way people live and communicate. Snap is proud to be an equal opportunity employer, and committed to providing employment opportunities regardless of race, religious creed, color, national origin, ancestry, physical disability, mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, pregnancy, childbirth and breastfeeding, age, sexual orientation, military or veteran status, or any other protected classification, in accordance with applicable federal, state, and local laws. EOE, including disability/vets.
We are an Equal Opportunity Employer and will consider qualified applicants with criminal histories in a manner consistent with applicable law (by example, the requirements of the San Francisco Fair Chance Ordinance and the Los Angeles Fair Chance Initiative for Hiring, where applicable).
Our Benefits: Snap Inc. is its own community, so we've got your back! We do our best to make sure you and your loved ones have everything you need to be happy and healthy, on your own terms. Our benefits are built around your needs and include paid parental leave, comprehensive medical coverage, emotional and mental health support programs, and compensation packages that let you share in Snap's long-term success!
Compensation
In the United States, work locations are assigned a pay zone which determines the salary range for the position. The successful candidate's starting pay will be determined based on job-related skills, experience, qualifications, work location, and market conditions. The starting pay may be negotiable within the salary range for the position.These pay zones may be modified in the future.
Zone A (CA, WA, NYC):
The base salary range for this position is $173,000-$259,000 annually.
Zone B:
The base salary range for this position is $164,000-$246,000 annually.
Zone C:
The base salary range for this position is $147,000-$220,000 annually.
This position is eligible for equity in the form of RSUs.

Apply