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Ai Chip Design Rtl Jobs in Raleigh, NC (NOW HIRING)

Nvidia

EDA Workflow Optimization Engineer

Durham, NC · Hybrid

$107K - $127K/yr

You will understand workflows covering the full chip design process from inception through study ... NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work ...

Nvidia

Senior ASIC Timing Engineer

Durham, NC · On-site

Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era ... chip level. * Analyze and optimize design constraints and synthesis parameters to achieve ...

Nvidia

Senior ASIC Timing Engineer

Durham, NC · Hybrid

... chip level. * Collaborate with Cross-Functional Teams: Work closely with RTL, DFX, Clocks, and ... Experience in physical design and optimization e.g., synthesis, placement, routing, logic ...

Qualcomm

Senior AI Performance Architect

Raleigh, NC · On-site

$162K/yr

Design and architecture of: * Flexible Computational Blocks * Involving a variety of datatypes ... Knowledge of Network-on-Chip (NoC) designs used in System-on-Chip (SoC) designs * Understanding of ...

Nvidia

Senior Architect

Durham, NC · On-site

Debugging performance and functional issues with high-level models, RTL simulation, and silicon ... Exposure/coursework related to Digital systems and VLSI design, Computer Architecture, C/C ...

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Ai Chip Design Rtl information

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$78.3K

$135.5K

$177.4K

How much do ai chip design rtl jobs pay per year?

As of Jun 19, 2026, the average yearly pay for ai chip design rtl in Raleigh, NC is $135,477.00, according to ZipRecruiter salary data. Most workers in this role earn between $132,200.00 and $132,200.00 per year, depending on experience, location, and employer.

What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?

AspectAi Chip Design RtlAi Chip Verification Engineer
Primary FocusDeveloping and implementing Register Transfer Level (RTL) code for AI chipsVerifying and validating RTL designs to ensure functionality
Skills RequiredHDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledgeSimulation, testbench creation, debugging, scripting skills
Work EnvironmentDesign teams, hardware development labs, EDA toolsVerification teams, simulation environments, test setups
CertificationsHardware design certifications, FPGA/ASIC trainingVerification methodologies, UVM, SystemVerilog certifications

While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.

What are some common challenges faced by AI Chip Design RTL engineers during the verification process?

AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.

What are AI Chip Design RTL engineers?

AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.

What are the key skills and qualifications needed to thrive as an AI Chip Design RTL Engineer, and why are they important?

To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.
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Ai Chip Design Rtl jobs near you
Staff Engineer - Digital ASIC and Signal Processing Chip Architect/Systems Engineer

Staff Engineer - Digital ASIC and Signal Processing Chip Architect/Systems Engineer

Analog Devices

Durham, NC • On-site

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 3 days ago

Analog Devices rating

8.5

Company rating: 8.5 out of 10

Based on 17 frontline employees who took The Breakroom Quiz

19th of 139 rated electronics manufacturers

Job description

About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X).
Staff Engineer - Digital ASIC and Signal Processing Chip Architect/Systems Engineer
About the Role
We are seeking an experienced and technically exceptional Staff Engineer for a role as Digital ASIC Chip Architect and Signal Processing System Engineer to join a high-performing team focused on the architecture and development of cutting-edge, mixed-signal and software-defined radio (SDR) signal chains. This role is ideal for a hands-on technical contributor with a deep background in digital signal processing and digital design, and a passion for shaping definition, requirements and solutions in a collaborative team. DSP and Digital System Architects work cross-functionally across development teams to specify and guide digital, firmware, software and processor subsystem requirements and architecture. A successful candidate will have a demonstrated ability to develop system specifications from application requirements and to innovate from architecture to circuit implementation.
Key Responsibilities
  • Architectural Leadership: Drive the definition and architecture of complex mixed-signal ICs and SDR chips, with a focus on digital accelerators and subsystems.
  • Cross-Functional Collaboration: Work closely with analog, RF, firmware, and software teams to ensure cohesive SoC and system-level design.
  • Requirements Management: Capture and maintain stakeholder requirements and ensure the development teams remained aligned throughout the program.
  • Project Execution: Support the successful execution of IC development programs from concept through tape-out and validation.
  • Mentorship and Culture: Foster a culture of technical excellence and continuous learning. Support the development of team members through mentoring and engagement.
  • Innovation and Strategy: Stay ahead of industry trends and emerging technologies to guide architectural decisions and maintain competitive advantage.
  • External Engagement: Work with Customers, Ecosystem Partners, and ADI stakeholders to define future SDR technologies.

Required Qualifications
  • 10+ years of experience, including 5 years of digital IC design.
  • Expertise in digital signal processing, RTL design, and digital architecture.
  • Strong knowledge of:
    • Firmware and embedded software
    • Radio architecture and signal chains
    • Microprocessor subsystems and digital accelerators
    • DSP cores and custom compute architecture
    • Hardware/Software Co-Design and Digital Modelling

Preferred Qualifications
  • Experience with system-level modeling and simulation (e.g., MATLAB, SystemVerilog, Python).
  • Signal Processing for Radio Signal Chains
  • Working understanding of signal processing for High-speed ADCs/DACs
  • SerDes and high-speed interfaces
  • Demonstrated ability of requirements capture and documentation.
  • Familiarity with SoC integration and verification methodologies.
  • Exposure to productization and manufacturing ICs in high-volume.
  • Strong written and verbal communication skills.

Why Join Us?
This is a rare opportunity to shape the future of advanced digital and mixed-signal systems in a role that blends deep technical engagement with systems thinking. You'll work with a passionate team on impactful technologies in a collaborative and innovative environment. For a survey of the types of devices we build, check out AD9084 (wideband MxFE), ADRV9040 (RF Transceiver), ADRV9003 (narrowband RF transceiver) on www.analog.com.
#LI-PG1
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
EEO is the Law: Notice of Applicant Rights Under the Law.
Job Req Type: Experienced
Required Travel: Yes, 10% of the time
Shift Type: 1st Shift/Days
The expected wage range for a new hire into this position is $131,285 to $190,108.
  • Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors.
  • This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.
  • This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.

What Analog Devices employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom

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About Analog Devices

Sourced by ZipRecruiter

Analog Devices (NASDAQ: ADI) designs and manufactures semiconductor products and solutions. We enable our customers to interpret the world around us by intelligently bridging the physical and digital worlds with unmatched technologies that sense, measure and connect.

Industry

Electrical equipment, appliance, and component manufacturing

Company size

5,001 - 10,000 Employees

Headquarters location

Norwood, MA, US

Year founded

1965

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