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60 Rivos Design Verification Engineer Jobs Hiring Near You

Design Verification Engineer

Santa Clara, CA · On-site

$160K - $196K/yr

We are looking for an adaptive, self-motivative Design Verification Engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve client's abilities ...

Design Verification Engineer

Santa Clara, CA · On-site

$160K - $196K/yr

We are looking for an adaptive, self-motivative Design Verification Engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve client's abilities ...

DESIGN VERIFICATION ENGINEER

Sunnyvale, TX · On-site

$60K - $148K/yr

DESIGN VERIFICATION ENGINEER City: Sunnyvale State/Province: California Posting Start Date: 5/28/26 Wipro Limited (NYSE: WIT, BSE: 507685, NSE: WIPRO) is a leading technology services and consulting ...

Design Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

Design Verification Engineer Location:Santa Clara CA Duration: Long term Experience:8-15 Years Description : Key Responsibilities: Strong understanding of SV and UVM and good debugging skills.

We're hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to ...

Showing results 41-60

Rivos Jobs Information

What other companies are hiring for Design Verification Engineer jobs?

$160K - $196K/yr

Contractor

Posted 21 days ago


Job description

Duration: 12+ Months
Top Must Have Skills:
  • Solid minimum 8 + years Design Verification Experience
  • Verification Experience with DDR5 Controller /PHY
  • System Verilog /UVM - Language Skills
 
THE ROLE:
We are looking for an adaptive, self-motivative Design Verification Engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve client's abilities to deliver the highest quality, industry-leading technologies to market. Be a part of a team that delivers Industry leading IP and help our experts in RTL, FW, circuit, and architecture teams develop leading edge and differentiating IPs.
THE PERSON:
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
  • Develop/Maintain tests for functional verification.
  • Build the directed and random verification tests, debug test failures to determine the root cause, work with RTL and firmware engineers to resolve design defects and correct any test issues.
  • Work on functional & code coverage verification.
  • Provide technical support to other teams
 
PREFERRED EXPERIENCE:
  • Experience with C/C++
  • Experience with Verilog, System Verilog, and modern verification libraries like UVM
  • 10+years of ASIC design verification experience
  • Experience / Background with DDR or Memory Controller. PHY Verification is a plus
  • Experience with scripting languages like Python, Perl and TCL is a plus.
  • Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
  • Understanding of Design for Test methodologies and DFT verification experience is a plus
  • Proficient in debugging firmware and RTL code using simulation tools
 
ACADEMIC CREDENTIALS:
  • Bachelor’s or master’s degree in computer engineering/Electrical Engineering
 
About US Tech Solutions:
US Tech Solutions is a global staff augmentation firm providing a wide range of talent on-demand and total workforce solutions. To know more about US Tech Solutions, please visit www.ustechsolutions.com.
US Tech Solutions is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.