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60 Neuralink User Interface Designer Jobs Hiring Near You

Neuralink

Clinical Scientist

Austin, TX

Team Description: The Neuralink Clinical team is at the heart of an ecosystem that merges ... We work to shape the future of brain-computer interface (BCI) technology through the planning ...

Neuralink

Digital IC Design Engineer

Austin, TX · On-site

$116K - $233K/yr

About Neuralink: We are creating devices that enable a bi-directional interface with the brain ... Experience in designing digital signal processing pipelines, from algorithm to RTL Preferred ...

Neuralink

R&D Lab Manager

South San Francisco, CA · On-site

About Neuralink: We are creating devices that enable a bi-directional interface with the brain ... user experience. Facilities & Vendor Coordination * Coordinate laboratory setup activities ...

Neuralink

Regulatory Engineer

Austin, TX · On-site

$71K - $119K/yr

About Neuralink: We are creating devices that enable a bi-directional interface with the brain ... designers, test engineers, and clinical teams, and distribute updated regulatory intelligence ...

Neuralink

Electrical Engineer, Robotics

Austin, TX

At Neuralink we recognize that increasing healthcare costs, lack of access, and insufficient ... To date, our designs have served over 20 individuals, and in the coming years our designs will ...

Neuralink

Neuroengineer, Next Gen

Austin, TX · On-site

The Next Gen team at Neuralink is developing the next generation of brain-computer interfaces. We ... projects, from designing novel experimental preparations, to interpreting neural signals and ...

Neuralink

Engineering Lab Manager

Austin, TX · On-site

$68K - $114K/yr

About Neuralink: We are creating devices that enable a bi-directional interface with the brain ... lab spaces are designed for efficiency and collaboration. You will play a pivotal role in ...

Neuralink

Software Engineer, ASIC

South San Francisco, CA · On-site

$123K - $216K/yr

About Neuralink: We are creating devices that enable a bi-directional interface with the brain ... We run a mixture of cloud-based and on-prem systems and have a user base spanning from highly ...

Neuralink

Robot Optics Intern

Austin, TX · On-site

$35/hr

About Neuralink: We are creating devices that enable a bi-directional interface with the brain ... testing, designing hardware acceptance testers, and overseeing manufacturing processes. and ...

Neuralink

Prototyping Lab Engineer & Manager

Austin, TX · On-site

$68K - $114K/yr

About Neuralink: We are creating devices that enable a bi-directional interface with the brain ... lab spaces are designed for efficiency and collaboration. You will play a pivotal role in ...

Neuralink

Neuroengineer Intern

South San Francisco, CA · On-site

$35/hr

The Next Gen team at Neuralink is developing the next generation of brain-computer interfaces. We ... projects, from designing novel experimental preparations, to interpreting neural signals and ...

Neuralink

Prototype & Design Specialist

Austin, TX · On-site

$68K - $114K/yr

About Neuralink: We are creating devices that enable a bi-directional interface with the brain ... lab spaces are designed for efficiency and collaboration. You will play a pivotal role in ...

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Infographic showing various User Interface Designer job openings at Neuralink in the United States as of August 2026, with employment types broken down into 26% Internship, 71% Full Time, and 3% Part Time. Highlights an 98% Physical, and 2% Remote job distribution.

Hardware/ Software Co-Design Engineer

Neuralink

Austin, TX • On-site

$151K - $261K/yr

Full-time

Medical, Dental, Vision, Retirement

Re-posted 13 days ago

Job description

About Neuralink:
We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world.
Team Description:
The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface applications. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.
Job Description & Responsibilities:
Our Hardware/ Software Co-Design Engineer will be responsible for delivering micro-architecture and register-transfer level (RTL) implementation of digital IPs and systems with a focus in high-throughput low-power digital signal processor (DSP) and general-purpose hardware accelerators towards realizing state-of-the-art brain-computer interfaces. Relevant product development experience in micro-architecture design for low-power processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML accelerators, and communication PHY/MAC will be preferred.
  • Micro-architecture design and RTL implementation of:
    • Low-power digital signal processors
    • Low-power general-purpose hardware accelerators
    • Low-power graphics processing units
    • Low-power radio MAC/PHY
    • Low-power serial link MAC/PHY
  • Design and optimization of hardware/software interface with firmware engineers
  • Application-specific architecture optimization including:
    • Complex system modeling for energy and performance benchmarks
    • Workload analysis and modeling
    • Energy/performance profiling and analysis
    • Leveraging architecture-level design trade-offs with process technology and workload type
    • Balancing cost and performance under manufacturing process variation
  • Collaboration on silicon bring-up tests with verification engineers

Required Qualifications:
  • Bachelor of Science (B.S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent experience
  • Evidence of exceptional ability in electrical engineering, computer science, or computer engineering
  • Experience designing and implementing embedded software in C or Rust
  • Expertise in SystemVerilog, C/C++, Python
  • Experience designing and implementing emulation models, transactors, and test environments to replicate hardware behavior
  • Experience working on complex digital systems from architecture, microarchitecture, and RTL, using industry standard tools
  • Experience in designing digital signal processing pipelines, from algorithm to RTL

Preferred Qualifications:
  • Experience in architecture optimization with process technology customization
  • Experience in the verification of complex digital systems, using industry standard tools
  • Experience in the physical design of complex digital systems, using industry standard tools
  • Experience testing and debugging digital system-on-a-chips
  • Functional modeling experience and logic verification with SystemVerilog, SystemC/C++
  • Experience automating tool flows
  • Experience in processor instruction set architecture design
  • Experience in compiler back-end design and customization

Expected Compensation:
The anticipated base salary for this position is expected to be within the following range. Your actual base pay will be determined by your job-related skills, experience, and relevant education or training. We also believe in aligning our employees' success with the company's long-term growth. As such, in addition to base salary, Neuralink offers equity compensation (in the form of Restricted Stock Units (RSU)) for all full-time employees.
Base Salary Range:
$151,000-$261,000 USD
What We Offer:
Full-time employees are eligible for the following benefits listed below.
  • An opportunity to change the world and work with some of the smartest and most talented experts from different fields
  • Growth potential; we rapidly advance team members who have an outsized impact
  • Excellent medical, dental, and vision insurance through a PPO plan
  • Paid holidays
  • Commuter benefits
  • Meals provided
  • Equity (RSUs) *Temporary Employees & Interns excluded
  • 401(k) plan *Interns initially excluded until they work 1,000 hours
  • Parental leave *Temporary Employees & Interns excluded
  • Flexible time off *Temporary Employees & Interns excluded

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