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Weekend Electroplating Process Engineer Jobs in Riverside, CA

... and construction processes * Thorough understanding of safety guidelines (OSHA statutes ... Ability to work in adverse weather and occasional overtime and weekends Working Conditions * Travel ...

Field Engineer

Corona, CA · On-site

$55K - $75K/yr

... and construction processes * Thorough understanding of safety guidelines (OSHA statutes ... Ability to work in adverse weather and occasional overtime and weekends Working Conditions * Travel ...

... weekend coverage required As a Field Service Engineer at Advanced Sterilization Products, you'll ... Responsible for processing RMA returns to support individual usage of supporting parts and ...

... weekend coverage required As a Field Service Engineer at ASP, you'll play a critical role in ... Responsible for processing RMA returns to support individual usage of supporting parts and ...

Sr. RFIC Engineer

Irvine, CA · On-site

$160K - $225K/yr

Develop analog/mixed-signal/RF/microwave circuits in SiGe, GaAs, GaN, or CMOS processes * Work with ... Ability to work long hours and weekends as necessary to support critical milestones * Willingness ...

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Quality Engineer

Santa Ana, CA · On-site

$90K - $115K/yr

The role includes performing supplier surveys, internal audits, and process audits. The Quality ... Work may require occasional weekend and/or evening work. The company has reviewed this to ensure ...

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Weekend Electroplating Process Engineer information

See Riverside, CA salary details

$51.6K

$96K

$148.7K

How much do weekend electroplating process engineer jobs pay per year?

As of Jul 9, 2026, the average yearly pay for weekend electroplating process engineer in Riverside, CA is $95,999.00, according to ZipRecruiter salary data. Most workers in this role earn between $77,700.00 and $107,500.00 per year, depending on experience, location, and employer.

What is the difference between Weekend Electroplating Process Engineer vs Weekend Electroplating Technician?

AspectWeekend Electroplating Process EngineerWeekend Electroplating Technician
ResponsibilitiesDesigns, develops, and optimizes electroplating processes, ensuring quality and efficiency.Performs electroplating tasks, maintains equipment, and follows established procedures.
Required CredentialsTypically requires a degree in engineering or related field; certifications are a plus.High school diploma or equivalent; technical training or certifications preferred.
Work EnvironmentLaboratories, manufacturing plants, or research facilities, often involving process oversight.Production floors, electroplating stations, and maintenance areas.

The main difference between a Weekend Electroplating Process Engineer and a Weekend Electroplating Technician lies in their roles. The engineer focuses on process development and optimization, requiring technical education, while the technician handles hands-on tasks and equipment maintenance. Both roles are essential in electroplating operations but differ in responsibilities and qualifications.

What are the most commonly searched types of Electroplating Process Engineer jobs in Riverside, CA? The most popular types of Electroplating Process Engineer jobs in Riverside, CA are:
What are popular job titles related to Weekend Electroplating Process Engineer jobs in Riverside, CA? For Weekend Electroplating Process Engineer jobs in Riverside, CA, the most frequently searched job titles are:
What job categories do people searching Weekend Electroplating Process Engineer jobs in Riverside, CA look for? The top searched job categories for Weekend Electroplating Process Engineer jobs in Riverside, CA are:
What cities near Riverside, CA are hiring for Weekend Electroplating Process Engineer jobs? Cities near Riverside, CA with the most Weekend Electroplating Process Engineer job openings:
Principal DFT Engineer (Silicon Engineering)

Principal DFT Engineer (Silicon Engineering)

SpaceX

Irvine, CA • On-site

$200K - $335K/yr

Other

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 18 days ago


SpaceX rating

8.7

Company rating: 8.7 out of 10

Based on 144 frontline employees who took The Breakroom Quiz

13th of 61 rated aerospace companies


Job description

PRINCIPAL DFT ENGINEER (SILICON ENGINEERING)

At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe. 

We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering and ASIC implementation). In this role, you will be developing next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.   

RESPONSIBILITIES:

  • Lead implementation and optimization of DFT architectures, including scan insertion, compression/decompression logic, memory BIST, and logic BIST, leveraging Siemens Tessent tools for RTL and gate netlist DFT implementation
  • Own ATPG tools and methodologies, including generating patterns for stuck-at, transition, and path delay fault models, while focusing on pattern compression, diagnosis, and hierarchical test flows. Provide post-silicon testing and validation support
  • Responsible for evaluating design readiness for scan insertion through RTL and physical design Scan Design Rule Check (DRC) tools
  • Integration and verification of Design for Test (DFT) fabrics and IP within Subsystems
  • Run and debug non-timing and SDF annotated gate level simulations
  • Develop test scripts, automate processes, and analyze data using programming languages such as Perl, Python, Tcl, or C+

BASIC QUALIFICATIONS:

  • Bachelor's degree in electrical engineering, computer engineering or computer science
  • 10+ years of experience working with ASICs
  • 10+ years of experience in scan insertion and DFT setup, integration and validation

PREFERRED SKILLS AND EXPERIENCE:

  • Leadership experience driving SOC DFT execution from concept through tapeout and product deployment
  • RTL experience to understand, trace and debug RTL connectivity issues as they pertain to DFT
  • Ability to solve complex problems including clock domain crossings and power optimization
  • Experience with UPF (Unified Power Format), formal verification, and DRC rule checking experience
  • Familiar with advanced silicon process and technology nodes for high speed and low power consumption
  • Strong implementation or integration of design blocks using Verilog/SystemVerilog
  • Experience working with ATE testers and test teams

ADDITIONAL REQUIREMENTS:

  • Ability to work extended hours and weekends as needed to meet critical milestones   

COMPENSATION AND BENEFITS:

Pay range:    
Physical Design Engineer/Principal: $200,000.00 - $335,000.00/per year    
Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.

Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation & will be eligible for 10 or more paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year.


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