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Vlsi Design Verification Engineer Jobs in Ohio (NOW HIRING)

$96.19K - $141.30K/yr

... verification, working closely with the PM, Technical Lead, other CapDev engineers (SW, HW, RF, ME ... As part of modernization efforts, design test cases and procedures for commonality across test ...

$96.19K - $141.30K/yr

... verification, working closely with the PM, Technical Lead, other CapDev engineers (SW, HW, RF, ME ... As part of modernization efforts, design test cases and procedures for commonality across test ...

The DVT Engineer - 2nd Shift is responsible for executing Design Verification Testing (DVT) activities to ensure liquid cooling products meet performance, reliability, and quality requirements. This ...

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Vlsi Design Verification Engineer information

See Ohio salary details

$100.3K

$141.8K

$158.8K

How much do vlsi design verification engineer jobs pay per year?

As of May 28, 2026, the average yearly pay for vlsi design verification engineer in Ohio is $141,796.00, according to ZipRecruiter salary data. Most workers in this role earn between $129,300.00 and $157,800.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a VLSI Design Verification Engineer, and why are they important?

To thrive as a VLSI Design Verification Engineer, you need a solid background in digital logic design, computer architecture, and verification methodologies, typically supported by a degree in electrical engineering or a related field. Proficiency with hardware description languages like Verilog or VHDL, simulation tools such as ModelSim or Synopsys VCS, and familiarity with UVM or SystemVerilog are commonly required. Strong analytical thinking, attention to detail, and effective communication are crucial soft skills for identifying design flaws and collaborating with cross-functional teams. These skills and qualifications ensure accurate, reliable chip designs and efficient project execution in the competitive semiconductor industry.

What are some common challenges faced by VLSI Design Verification Engineers during the verification process?

VLSI Design Verification Engineers often encounter challenges such as managing increasingly complex system-on-chip (SoC) designs, ensuring thorough test coverage, and debugging intricate functional issues. Coordinating with cross-functional teams—like design, software, and validation—is essential to align test plans and resolve ambiguities quickly. Additionally, keeping up with evolving verification methodologies and tools (such as UVM or SystemVerilog) requires a commitment to continuous learning, but offers strong career growth opportunities for those who master them.

What is a VLSI Design Verification Engineer?

A VLSI Design Verification Engineer is a specialist responsible for ensuring that integrated circuits (ICs) and systems-on-chip (SoCs) meet their design specifications before manufacturing. They use various verification methodologies, such as simulation, formal verification, and hardware emulation, to identify and fix functional errors in digital designs. Their role is critical in the semiconductor industry to ensure product quality, reduce costly re-spins, and speed up time-to-market. They often work closely with design engineers, using tools like SystemVerilog, UVM, and other verification frameworks.

What is the difference between Vlsi Design Verification Engineer vs Vlsi Design Engineer?

AspectVlsi Design Verification EngineerVlsi Design Engineer
Primary FocusVerifying the correctness of VLSI designs through testing and simulationCreating and implementing VLSI chip designs and architectures
Skills & CertificationsHardware description languages (HDL), verification tools, scripting, knowledge of verification methodologiesHDL, digital design, synthesis, timing analysis, and physical design skills
Work EnvironmentDesign teams, verification labs, simulation environmentsDesign teams, synthesis and implementation tools, physical design environments

While both roles require HDL knowledge and work within VLSI teams, the Vlsi Design Verification Engineer primarily focuses on testing and validating designs, whereas the Vlsi Design Engineer is responsible for creating and implementing the actual chip designs.

What job categories do people searching Vlsi Design Verification Engineer jobs in Ohio look for? The top searched job categories for Vlsi Design Verification Engineer jobs in Ohio are:
What cities in Ohio are hiring for Vlsi Design Verification Engineer jobs? Cities in Ohio with the most Vlsi Design Verification Engineer job openings:
Infographic showing various Vlsi Design Verification Engineer job openings in Ohio as of May 2026, with employment types broken down into 41% Full Time, 49% Part Time, and 10% Contract. Highlights an 76% Physical, and 24% Remote job distribution, with an average salary of $141,796 per year, or $68.2 per hour.
Assistant Professor of Digital Systems Design and/or VLSI Design - Department of Electrical and C...

Assistant Professor of Digital Systems Design and/or VLSI Design - Department of Electrical and C...

CSU Northridge

Northridge, OH

Other

Posted 25 days ago


Job description

Assistant Professor of Digital Systems Design and/or VLSI Design - Department of Electrical and Computer Engineering #26-28

Apply now Job no: 555602
Work type: Instructional Faculty - Tenured/Tenure-Track
Location: Northridge
Categories: Unit 3 - CFA - California Faculty Association, Tenured/Tenure-Track, Full Time, Faculty - Engineering

Tenure-Track Faculty Position Announcement

Department: Electrical and Computer Engineering

Faculty Hire Number: #26-28

Rank: Assistant Professor, Tenure Track

Effective Date of Appointment: August 20, 2026 (Subject to Budgetary Approval)

Anticipated Hiring Range: $105,000 to $115,000 (Dependent upon qualifications)


CSUN's Commitment to You:

CSUN is committed to achieving excellence through teaching, scholarship, learning, and inclusion. Our values include a respect for all people, building partnerships with the community, and the encouragement of innovation, experimentation, and creativity. CSUN strives to cultivate a community in which a diverse population can learn and work in an atmosphere of civility and respect. CSUN is especially interested in candidates who make contributions to equity and inclusion in the pursuit of excellence for all members of the university community.

As a Hispanic-serving Institution (HSI), inclusiveness and diversity are integral to CSUN's commitment to excellence in teaching, research, and engagement. As of Fall 2025, CSUN enrolls 36,960 students, where 57.5% are Latinx, 18.4% are White, 8.5% are Asian-American, 5.5% are Black/African American, 0.1% are Native American, and 0.1% are Native Hawaiian or Pacific Islander. 

For more information about the University, visit: http://www.csun.edu

About the College:

The College of Engineering and Computer Science seeks to be a recognized center for excellence for baccalaureate and master's level education in computer science and engineering. The College provides a quality education for its students. It is also a partner in the professional communities of computer science and engineering and provides an essential link between students' education and professional practice.

For more information about the College of Engineering and Computer Science, see: https://w2.csun.edu/engineering-computer-science/college

About the Department:

The mission of the Electrical and Computer Engineering Department is to prepare students for rewarding careers and higher education. The department offers Bachelor of Science Degrees in Electrical Engineering (EE) and Computer Engineering (CE) and Master of Science Degrees in Electrical Engineering and Computer Engineering. Currently, there are approximately 495 undergraduate majors in EE, 433 undergraduate majors in CE, and 206 graduate students. Master's degree students are required to complete a thesis or project.

For more information about the Department of Electrical and Computer Engineering, see: https://csun.edu/ece

Position:

The Department of Electrical and Computer Engineering at California State University, Northridge (CSUN) is seeking a tenure-track faculty member at the rank of Assistant Professor in the area of Digital Systems Design and/or Very Large-Scale Integration (VLSI) Design.

The successful candidate will teach a variety of undergraduate and graduate courses and labs in the Electrical and Computer Engineering and maintain an active research program in Digital Systems Design and/or VLSI Design.

In addition to teaching, the position requires weekly office hours, attending faculty meetings, participation in assessment of student learning, and service to the department, college, and university. The successful candidate may be required to teach on weekdays, evenings, weekends, and/or online and will be held to the standards and requirements of the college and department in which he/she/they is/are housed for recommending tenure and promotion. Given CSUN's commitment to excellence in teaching, research, and engagement in a diverse environment, the successful candidate will help the Department achieve equitable academic outcomes for all students through teaching, student mentorship, scholarship, and service.

Required Qualifications:  

  • Ph.D. in Computer Engineering, Electrical Engineering, or a closely related field with specialization in Digital Systems Design and/or VLSI Design from an accredited institution.  All But Dissertation (ABD) candidates will be considered, but must complete the doctoral degree before August 20, 2026.
  • Taught at least one Electrical Engineering or Computer Engineering class (either in-person or online) at the College/University level, either as an instructor of record or as a teaching assistant, or demonstrated strong teaching potential in their teaching statement.
  • At least three peer-reviewed conference papers or journal articles (IEEE, or comparable venues) published within the last five years in areas related to Digital Systems Design and/or VLSI Design.

Preferred Qualifications:

  • Evidence of effective engagement or potential to engage with a diverse student body
  • Experience using culturally responsive pedagogy that leads to equitable outcomes for all students
  • Experience creating a student-centered learning environment
  • Research/Lab experience that includes working with students from diverse backgrounds
  • Experience adopting inclusive approaches to mentoring
  • Demonstrated experience in teaching Verilog/VHDL Digital Systems Design courses using industry-standard EDA tools and design flow
  • Demonstrated experience in teaching VLSI Design courses in one or more of the following areas: front-end and back-end digital design, RF/microwave/digital/mixed-signal integrated circuits, CMOS devices, and fabrication process technology
  • Demonstrated experience in teaching advanced VLSI design courses in one or more of the following areas: Generative AI, AI accelerator, AI for Electronic Design Automation (EDA), energy-efficient integrated circuit design, FinFET/Gate-All-Around Field-Effect Transistor (GAAFET), RF and mm-Wave Wireless Receivers, and biomedical interface circuits
  • Demonstrated experience in teaching embedded and real-time systems, including the design and implementation of systems based on Real-Time Operating Systems (RTOS)
  • Demonstrated industry design expertise in one or more of the following: digital design (RTL/microarchitecture), functional verification, standard cell/library design, implementation/physical design (synthesis, static timing analysis, place-and-route), design-for-test (DFT), analog/mixed-signal or RF/microwave integrated circuits, CMOS devices, and/or semiconductor fabrication/process technology.
  • Evidence of scholarly contribution to Digital Systems Design and/or VLSI design 
  • Experience in grant proposal preparation

Application Deadline:

The preferred application deadline is April 3rd, 2026, and applications received after this date may be considered on an as-needed basis. However, the position will remain open until filled.

How to Apply:

Candidates should apply by completing the CSUN online application. To apply and for more detailed information on the application and hiring process, please visit this link: www.csun.edu/careers  

Applicants must submit a letter of application addressing the required and preferred qualifications (inclusive of applicant's experience working with a culturally diverse population), a curriculum vitae, a teaching statement, and a research statement to the website in the section above. In later stages of the search process, applicants may be requested to provide additional materials, including letters of recommendation, professional work samples, verification of terminal degrees, licenses, and certificates.

At the time of appointment, the successful candidate, if not a U.S. citizen, must have authorization from the United States Citizenship and Immigration Services (USCIS) to work in the United States. Applicants must be authorized to work for any employer in the United States.

Please note: California State University, Northridge (CSUN) is currently not sponsoring applicants for H-1B employment that are subject to the $100,000 fee established by the "Presidential Proclamation: Restriction on Entry of Certain Nonimmigrant Workers" issued on September 19, 2025. Applicants are responsible for determining the applicability of the fee.

General Information:

In compliance with the Annual Security Report & Fire Safety Report of Campus Security Policy and Campus Crime Statistics Act, California State University, Northridge has made crime-reporting statistics available online here. Print copies are available by request from the Department of Police Services, the Office for Faculty Affairs, and the Office of Equity and Diversity.

The person holding this position may be considered a 'mandated reporter' under the California Child Abuse and Neglect Reporting Act and is required to comply with the requirements set forth in CSU Executive Order 1083 as a condition of employment.

A background check (including a criminal records check) must be completed satisfactorily before any candidate can be offered a position with the CSU. Failure to satisfactorily complete the background check may affect the application status of applicants or the continued employment of current CSU employees who apply for the position.

In accordance with the California State University (CSU) Out-of-State Employment Policy, the CSU is a state entity whose business operations reside within the State of California and prohibits hiring employees to perform CSU-related work outside of California.

CSUN is an Equal Opportunity Employer and prohibits discrimination based on race, color, ethnicity, religion, national origin, age, gender, gender identity/expression, sexual orientation, genetic information, medical condition, marital status, veteran status, and disability. Our nondiscrimination policy is set forth in the Interim CSU Nondiscrimination Policy. Reasonable accommodations will be provided for applicants with disabilities who self-disclose by contacting HR at 818-677- 6510/3351.

Advertised: Mar 03, 2026 (12:00 PM) Pacific Standard Time
Applications close:

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