CAD Engineer
Santa Clara, CA · Hybrid
... IC-Manage, DRC/LVS verification tools, extractions, and spice simulation tools. * Work with CAD ... A basic understanding of mosfet device behavior, CMOS layout, and VLSI design. * Excellent ...
Santa Clara, CA · Hybrid
... IC-Manage, DRC/LVS verification tools, extractions, and spice simulation tools. * Work with CAD ... A basic understanding of mosfet device behavior, CMOS layout, and VLSI design. * Excellent ...
Santa Clara, CA · Hybrid
... IC-Manage, DRC/LVS verification tools, extractions, and spice simulation tools. * Work with CAD ... A basic understanding of mosfet device behavior, CMOS layout, and VLSI design. * Excellent ...
Santa Clara, CA · On-site
... IC-Manage, DRC/LVS verification tools, extractions, and spice simulation tools. * Work with CAD ... A basic understanding of mosfet device behavior, CMOS layout, and VLSI design. * Excellent ...
Santa Clara, CA · On-site
... IC-Manage, DRC/LVS verification tools, extractions, and spice simulation tools. * Work with CAD ... A basic understanding of mosfet device behavior, CMOS layout, and VLSI design. * Excellent ...
Santa Clara, CA · On-site
... IC-Manage, DRC/LVS verification tools, extractions, and spice simulation tools. * Work with CAD ... A basic understanding of mosfet device behavior, CMOS layout, and VLSI design. * Excellent ...
Santa Clara, CA · On-site
... IC-Manage, DRC/LVS verification tools, extractions, and spice simulation tools. * Work with CAD ... A basic understanding of mosfet device behavior, CMOS layout, and VLSI design. * Excellent ...
Sunnyvale, CA · Hybrid
$160.10K - $164.80K/yr
Hybrid // Physical Design Engineer-ASICs, SoCs, VLSI Physical Design Engineer-ASICs, SoCs, VLSI ... Chip-Level Floorplanning & Hierarchical Design - Manage top-level layout planning , pin assignments ...
Sunnyvale, CA · Hybrid
$160.10K - $164.80K/yr
Hybrid // Physical Design Engineer-ASICs, SoCs, VLSI Physical Design Engineer-ASICs, SoCs, VLSI ... Chip-Level Floorplanning & Hierarchical Design - Manage top-level layout planning , pin assignments ...
Santa Clara, CA · On-site
... IC-Manage, DRC/LVS verification tools, extractions, and spice simulation tools. * Work with CAD ... A basic understanding of mosfet device behavior, CMOS layout, and VLSI design. * Excellent ...
Santa Clara, CA · On-site
... IC-Manage, DRC/LVS verification tools, extractions, and spice simulation tools. * Work with CAD ... A basic understanding of mosfet device behavior, CMOS layout, and VLSI design. * Excellent ...
Santa Clara, CA · Hybrid
$122.10K - $164.40K/yr
... VLSI design. We are looking for someone who loves to write code to automate design processes and ... Support and maintain CAD tools used by IC designers including Virtuoso, IC-Manage, HSPICE, ADE ...
Santa Clara, CA · Hybrid
$122.10K - $164.40K/yr
... VLSI design. We are looking for someone who loves to write code to automate design processes and ... Support and maintain CAD tools used by IC designers including Virtuoso, IC-Manage, HSPICE, ADE ...
Hillsboro, OR · Hybrid
$113.30K - $152.50K/yr
... VLSI design. We are looking for someone who loves to write code to automate design processes and ... Support and maintain CAD tools used by IC designers including Virtuoso, IC-Manage, HSPICE, ADE ...
Hillsboro, OR · Hybrid
$113.30K - $152.50K/yr
... VLSI design. We are looking for someone who loves to write code to automate design processes and ... Support and maintain CAD tools used by IC designers including Virtuoso, IC-Manage, HSPICE, ADE ...
Mountain View, CA · On-site
$100K - $180K/yr
The ideal candidate will be responsible for various aspects of the backend VLSI design flow ... Chip-Level Floorplanning & Hierarchical Design - Manage top-level layout planning, pin assignments ...
Mountain View, CA · On-site
$100K - $180K/yr
The ideal candidate will be responsible for various aspects of the backend VLSI design flow ... Chip-Level Floorplanning & Hierarchical Design - Manage top-level layout planning, pin assignments ...
Durham, NC · Hybrid
... VLSI solutions. May direct support personnel in the preparation of detailed design, design testing and prototype fabrication. Management Level Definition: Contributions include applying developed ...
Durham, NC · Hybrid
... VLSI solutions. May direct support personnel in the preparation of detailed design, design testing and prototype fabrication. Management Level Definition: Contributions include applying developed ...
Durham, NC · On-site
... VLSI solutions. May direct support personnel in the preparation of detailed design, design testing and prototype fabrication. Management Level Definition: Contributions include applying developed ...
Durham, NC · On-site
... VLSI solutions. May direct support personnel in the preparation of detailed design, design testing and prototype fabrication. Management Level Definition: Contributions include applying developed ...
Austin, TX · Hybrid
$103.10K - $138.80K/yr
... VLSI design. We are looking for someone who loves to write code to automate design processes and ... Support and maintain CAD tools used by IC designers including Virtuoso, IC-Manage, HSPICE, ADE ...
Austin, TX · Hybrid
$103.10K - $138.80K/yr
... VLSI design. We are looking for someone who loves to write code to automate design processes and ... Support and maintain CAD tools used by IC designers including Virtuoso, IC-Manage, HSPICE, ADE ...
Durham, NC · Hybrid
... VLSI solutions. May direct support personnel in the preparation of detailed design, design testing and prototype fabrication. Management Level Definition: Contributions include applying developed ...
Durham, NC · Hybrid
... VLSI solutions. May direct support personnel in the preparation of detailed design, design testing and prototype fabrication. Management Level Definition: Contributions include applying developed ...
Sunnyvale, TX · On-site
$60K - $148.50K/yr
The ideal candidate will be responsible for various aspects of the backend VLSI design flow ... Top-Level Physical Design: • Chip-Level Floorplanning & Hierarchical Design - Manage top-level ...
New
Sunnyvale, TX · On-site
$60K - $148.50K/yr
The ideal candidate will be responsible for various aspects of the backend VLSI design flow ... Top-Level Physical Design: • Chip-Level Floorplanning & Hierarchical Design - Manage top-level ...
New
Durham, NC · Hybrid
... VLSI solutions. May direct support personnel in the preparation of detailed design, design testing and prototype fabrication. Management Level Definition: Contributions include applying developed ...
Durham, NC · Hybrid
... VLSI solutions. May direct support personnel in the preparation of detailed design, design testing and prototype fabrication. Management Level Definition: Contributions include applying developed ...
Irvine, CA · On-site
$71 - $85.75/hr
... of VLSI design methodologies and chip lifecycle management. • Expertise in IP protection, segregation, and compliance within complex system integrations. • Familiarity with key EDA functions ...
Quick apply
Irvine, CA · On-site
$71 - $85.75/hr
... of VLSI design methodologies and chip lifecycle management. • Expertise in IP protection, segregation, and compliance within complex system integrations. • Familiarity with key EDA functions ...
Santa Clara, CA · On-site
$122.70K - $168.50K/yr
... IC-Manage, DRC/LVS verification tools, extractions, and spice simulation tools. * Work with CAD ... Basic understanding of mosfet device behavior, CMOS layout, and VLSI design. * Excellent ...
Santa Clara, CA · On-site
$122.70K - $168.50K/yr
... IC-Manage, DRC/LVS verification tools, extractions, and spice simulation tools. * Work with CAD ... Basic understanding of mosfet device behavior, CMOS layout, and VLSI design. * Excellent ...
San Diego, CA · On-site
$144.40K - $148.60K/yr
... manage schedules and support cross-functional engineering efforts for the success of Apple's SoC ... Proficient in automating and debugging verification flows for digital VLSI design.Experience with ...
San Diego, CA · On-site
$144.40K - $148.60K/yr
... manage schedules and support cross-functional engineering efforts for the success of Apple's SoC ... Proficient in automating and debugging verification flows for digital VLSI design.Experience with ...
Provide supervised layout guidance, manage design characterization, and oversee methodology ... In-depth knowledge of VLSI design, digital integrated circuits, Verilog, logic design, and DFT.
Provide supervised layout guidance, manage design characterization, and oversee methodology ... In-depth knowledge of VLSI design, digital integrated circuits, Verilog, logic design, and DFT.
Santa Clara, CA · Hybrid
$122.70K - $168.50K/yr
... IC-Manage, DRC/LVS verification tools, extractions, and spice simulation tools. * Work with CAD ... Basic understanding of mosfet device behavior, CMOS layout, and VLSI design. * Excellent ...
Santa Clara, CA · Hybrid
$122.70K - $168.50K/yr
... IC-Manage, DRC/LVS verification tools, extractions, and spice simulation tools. * Work with CAD ... Basic understanding of mosfet device behavior, CMOS layout, and VLSI design. * Excellent ...
A well-qualified candidate will have an understanding of circuits, layouts, VLSI design and ... Act as Linux, Subversion (SVN) version control, and Keysight (Cliosoft) Design Data Management (SOS ...
A well-qualified candidate will have an understanding of circuits, layouts, VLSI design and ... Act as Linux, Subversion (SVN) version control, and Keysight (Cliosoft) Design Data Management (SOS ...
$42K - $56.5K
4% of jobs
$56.5K - $71K
8% of jobs
$81.6K is the 25th percentile. Wages below this are outliers.
$71K - $85.5K
17% of jobs
The median wage is $99K / yr.
$85.5K - $100K
22% of jobs
$100K - $114.5K
15% of jobs
$114.5K - $129K
6% of jobs
$133.7K is the 75th percentile. Wages above this are outliers.
$129K - $143.5K
7% of jobs
$143.5K - $158K
7% of jobs
$158K - $172.5K
8% of jobs
$172.5K - $187K
2% of jobs
$187K - $201.5K
2% of jobs
$42K
$114.5K
$201.5K
| Aspect | Vlsi Design Manager | Vlsi Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's/Master's in Electrical Engineering, relevant experience, leadership skills | Bachelor's/Master's in Electrical Engineering, strong technical skills |
| Work Environment | Team leadership, project management, cross-functional collaboration | Design, simulation, coding, testing of VLSI circuits |
| Employer & Industry Usage | Foundries, fabless companies, semiconductor firms | Design houses, semiconductor companies, tech firms |
| Common Search & Comparison Intent | Understanding managerial roles in VLSI design | Technical design and implementation tasks |
The Vlsi Design Manager oversees design teams, manages projects, and ensures timely delivery, requiring leadership and project management skills. In contrast, the Vlsi Design Engineer focuses on the technical aspects of circuit design, simulation, and verification. Both roles are essential in the semiconductor industry but differ mainly in scope and responsibilities.

NVIDIA is searching for a motivated CAD Engineer to join the Advanced Technology Group. You will support installation of foundry techfiles. You will provide expert support to designers in debugging tool, techfile and design errors. And you will develop flows and scripts to improve productivity of custom circuit designers worldwide! A successful candidate will have solid EE or CS background with an understanding of circuits, layouts and VLSI design. We are looking for someone who enjoys writing code to automate design processes and who enjoys working in groundbreaking process technologies. A strong background in Skill, Perl and C++ is needed for this position. The job involves both development and support. Due to the support nature of this role, this candidate should possess good interpersonal skills.
What you'll be doing:
Install, configure, and support foundry techfiles.
Perform expert debug of design errors to direct expeditious resolution: explaining user errors to designers; explaining techfile errors to the foundry support team, and explaining tool errors to EDA partners.
Custom edit foundry techfiles to define and implement NVIDIA design methodologies.
We use a variety of standard off-the-shelf EDA tools at NVIDIA. You would be responsible for supporting and maintaining CAD tools used by IC designers including Virtuoso, IC-Manage, DRC/LVS verification tools, extractions, and spice simulation tools.
Work with CAD tool vendors to identify and resolve bugs, improve tool usability, and evaluate new tools and features.
Develop infrastructure to support design work in new process technologies.
Write scripts using perl, Cadence SKILL, and C++.
What we need to see:
B.S. in Electrical Engineering (or equivalent experience); MS preferred
2 plus year of work experience
A basic understanding of mosfet device behavior, CMOS layout, and VLSI design.
Excellent programming skills; experience with perl, Cadence SKILL, C++, tcl.
Great interpersonal skills
Passionate about providing excellent support for end-users.
NVIDIA has some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our exclusive engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you.
#LI-Hybrid
You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Computer and electronic product manufacturing
10,000+ Employees
Santa Clara, CA, US
1993