1

Vhdl Jobs (NOW HIRING)

Ingeniero/a logica programable

Midland City, AL · On-site

$182K/yr

Development of advanced synthesizable VHDL code. * Verification of logic circuits using VHDL testbenches and simulators such as Modelsim. * Control Interface Design: Implementation and management of ...

The candidate will work with team-based VHDL development processes for FPGA-based designs is required, including VHDL development, simulation, veri?cation, synthesis, timing closure and hardware ...

Digital Design Engineer

Lexington, MA · On-site

$120 - $126/hr

A digital design engineer is needed to develop VHDL for use in a free-space optical communication system. Requirements: -Greater than 7 years of experience with team based VHDL development processes ...

The candidate will work with team-based VHDL development processes for FPGA-based designs is required, including VHDL development, simulation, verication, synthesis, timing closure and hardware-based ...

The candidate will work with team-based VHDL development processes for FPGA-based designs is required, including VHDL development, simulation, verification, synthesis, timing closure and hardware ...

next page

Showing results 1-20

Vhdl information

See salary details

$33K

$76.6K

$130K

How much do vhdl jobs pay per year?

As of Jul 7, 2026, the average yearly pay for vhdl in the United States is $76,639.00, according to ZipRecruiter salary data. Most workers in this role earn between $45,500.00 and $130,000.00 per year, depending on experience, location, and employer.

What is a VHDL job?

A VHDL job typically involves designing, implementing, and testing digital circuits using the VHDL hardware description language. Professionals in this role work on FPGA and ASIC development, translating system requirements into efficient digital designs. They often collaborate with engineers to verify functionality and optimize performance. Common industries for VHDL jobs include telecommunications, aerospace, and semiconductor manufacturing.

What are the typical daily tasks and work environment for a VHDL Engineer?

As a VHDL Engineer, your daily tasks often include writing and testing VHDL code for digital circuit designs, simulating and debugging hardware behavior, and collaborating with other hardware and software engineers to ensure project requirements are met. You might spend significant time using development tools, participating in design reviews, and documenting design changes or test results. The work environment is usually team-oriented, involving close interaction with cross-functional engineering groups and occasional meetings with project managers or clients. This collaborative structure helps ensure that designs are robust, integrate smoothly with other systems, and meet project deadlines.

What are the key skills and qualifications needed to thrive in the Vhdl position, and why are they important?

To thrive in a VHDL Engineer role, you need a strong background in digital design, hardware description languages (especially VHDL), and a degree in electrical engineering or a related field. Familiarity with FPGA/ASIC development tools such as Xilinx Vivado, Altera Quartus, and simulation software is typically required, and certifications in FPGA design are advantageous. Strong analytical thinking, attention to detail, and effective communication are key soft skills for collaborating on complex projects. These skills ensure accurate design, efficient problem-solving, and successful integration within multidisciplinary engineering teams.

More about Vhdl jobs
What cities are hiring for Vhdl jobs? Cities with the most Vhdl job openings:
What are the most commonly searched types of Vhdl jobs? The most popular types of Vhdl jobs are:
What states have the most Vhdl jobs? States with the most job openings for Vhdl jobs include:
Infographic showing various Vhdl job openings in the United States as of July 2026, with employment types broken down into 95% Full Time, 2% Part Time, and 3% Contract. Highlights an 97% Physical, 1% Hybrid, and 2% Remote job distribution, with an average salary of $76,639 per year, or $36.8 per hour.
FPGA/ASIC Design Engineer (US Citizen) - Camden, NJ - 4822

FPGA/ASIC Design Engineer (US Citizen) - Camden, NJ - 4822

Altimeter Solutions

Camden, NJ • On-site

$124K - $171K/yr

Contractor

Re-posted 3 days ago


Job description

Important Notes:
  • VHDL Experience is required for all candidates to be considered.
  • Looking for mid-senior level folks

We've determined which skillsets are most beneficial for this role. These skills are listed first below as the Must Haves and Nice to Haves our hiring team highly prefers. Below that you'll find the standard job description for this opportunity.
Must Haves:
  • Proficient in VHDL >5 yrs, Xilinx FPGA design EDA- Vivado
  • Must have done hands on multiple complex designs arch/design/verification/Synthesis/STA
  • Big Plus
  • Working with Ethernet protocol (not just instantiating the IP) Is a big plus.
  • Mentor EDA CDC/Lint/AC/RDC
  • At least 3-year experience with proven track record of implementing complex algorithms targeting ASIC/FPGAs
  • Bachelor of Science in Electrical Engineering or Computer Science or equivalent Master of Science in Electrical Engineering or Computer Science preferred.
  • Proficiency in VHDL and FPGA design/debug Xilinx FPGA / Vivado
  • Excellent Analytical/Debug skills
  • Good verbal, written, and presentation skills
  • US Citizenship required
  • High Level Synthesis (HLS) with Vivado,
  • Embedded SW C++ (OOP) and System Verilog Assertions (SVA)
  • Knowledge of high-speed protocols (PCIe, TCP/IP, Ethernet).

Nice to Haves:
N/A
Job Description:
Develop architectures for the implementation of high throughput complex designs involving Cryptographic Algorithms (VHDL) with high-speed protocols NVMe, PCIe/SRIOV, 10G-400G Ethernet, TCP/IP, and IP development/integration targeting ARM SOC FPGAs (Ex. Xilinx MPSOC) AND/OR ASICs.
Additionally, S/He will be responsible for writing/debugging tests/sequences for End-to-End simulation on UVM framework, with System Verilog Assertions, and writing/debugging C++ based SW driven validation on SOC evaluation boards (Xilinx MPSOC) running Linux.
Please see our website for more job openings: https://altimetersolutions.com/altimeter-solutions-job-board/