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Verilog Engineer Salary Jobs (NOW HIRING)

OMNIVISION

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

Design and design debug with System Verilog; Logic design and analysis. * Processing Subsystem ... Annual base salary for this role in California, US is expected to be between $156,853 - $160,000.

OMNIVISION

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

Design and design debug with System Verilog; Logic design and analysis. * Processing Subsystem ... Annual base salary for this role in California, US is expected to be between $156,853 - $160,000.

OMNIVISION

SoC Design Engineer

Santa Clara, CA · On-site

Design and design debug with System Verilog; Logic design and analysis. * Processing Subsystem ... Annual base salary for this role in California, US is expected to be between $156,853 - $160,000.

Cisco

ASIC Design Engineer Technical Lead

San Jose, CA · On-site

$186K - $267K/yr

Implement Verilog RTL to meet timing and performance requirements. * Help define, evolve, and ... The starting salary range posted for this position is $186,900.00 to $267,700.00 and reflects the ...

Cisco

ASIC Design Engineer Technical Lead

San Jose, CA · On-site

$186K - $267K/yr

Implement Verilog RTL to meet timing and performance requirements. * Help define, evolve, and ... The starting salary range posted for this position is $186,900.00 to $267,700.00 and reflects the ...

OMNIVISION

Quality Engineer

Santa Clara, CA

$120K - $125K/yr

Verilog programming * Semiconductor physics * Reliability prediction Annual base salary for this role in California, US is expected to be between $120,182 - $125,000. Actual pay will be determined on ...

OmniVision Technologies

Quality Engineer

Santa Clara, CA

$120K - $125K/yr

Verilog programming * Semiconductor physics * Reliability prediction Annual base salary for this role in California, US is expected to be between $120,182 - $125,000. Actual pay will be determined on ...

OMNIVISION

Quality Engineer

Santa Clara, CA · On-site

$120K - $125K/yr

Verilog programming * Semiconductor physics * Reliability prediction Annual base salary for this role in California, US is expected to be between $120,182 - $125,000. Actual pay will be determined on ...

OMNIVISION

Quality Engineer

Santa Clara, CA

Verilog programming * Semiconductor physics * Reliability prediction Annual base salary for this role in California, US is expected to be between $120,182 - $125,000. Actual pay will be determined on ...

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All JobsVerilog Engineer Salary Jobs

Verilog Engineer Salary information

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$38K

$115.9K

$191.5K

How much do verilog engineer salary jobs pay per year?

As of Aug 13, 2026, the average yearly pay for verilog engineer salary in the United States is $115,864.00, according to ZipRecruiter salary data. Most workers in this role earn between $83,000.00 and $151,500.00 per year, depending on experience, location, and employer.

What is the difference between Verilog Engineer Salary vs FPGA Engineer Salary?

AspectVerilog Engineer SalaryFPGA Engineer Salary
Required CredentialsBachelor's in Electrical Engineering or related field, knowledge of VerilogBachelor's in Electrical Engineering or related field, expertise in FPGA design
Work EnvironmentSemiconductor companies, electronics firms, research labsEmbedded systems, hardware design firms, semiconductor industry
Industry UsageDesign and verification of digital circuits using VerilogDevelopment of FPGA-based solutions and hardware acceleration

Both roles require similar educational backgrounds and industry experience, but FPGA Engineers often focus more on hardware implementation using FPGAs, while Verilog Engineers specialize in hardware description language design. Salary differences depend on experience, location, and specific industry demands.

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Verilog Engineer Salary jobs near you
Infographic showing various Verilog Engineer Salary job openings in the United States as of August 2026, with employment types broken down into 100% Full Time. Highlights an 100% In-person job distribution, with an average salary of $115,864 per year, or $55.7 per hour.

SoC Design Engineer

OMNIVISION

Santa Clara, CA • On-site

$156K - $160K/yr

Full-time

Re-posted 7 days ago

Job description

Job Title: SoC Design Engineer
 
Job Duties:  
 
Be responsible for digital design of ASIC cores within image sensor SoC products, including IP design, analysis, integration, and validation. Collaborate with physical design teams on floor-planning, timing closure, and DFT implementation. Conduct timing control logic design and static timing analysis (STA) for sensor interfaces and mixed-signal integration. Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline according to PRD/design specification and system architecture of SoC products, following ASIC design flow: coding, simulation, synthesis, static timing analysis, formality verification, DFT, using Simvision, EDA tools such as Prime Time, cadence Virtuoso, Design Compiler, Integrator, and Verilog and System Verilog programming languages etc. Conduct design verification and modeling using SVA, Python, Perl, C++/C, and HLS. Work with digital and analog engineers for system design, integration and validation. Work with algorithm engineers for module level design, including hardware C model implementation, micro architecture design, RTL design and hardware/software co-simulation. Work with algorithm and application engineers for project-based microarchitecture improvements. Conduct silicon validation, debugging and tuning.
 
Requirements:
 
Master’s degree or foreign equivalent degree in Electrical Engineering, Computer Engineering, or a related field.
 
Required skills and/or academic training in the following: 
 
  • Arithmetic circuit design related to general datapath circuits, ML and AI circuits.
  • Arithmetic circuit design, timing analysis; synchronous and asynchronous FSMs; power, test, and debug.
  • Design and design debug with System Verilog; Logic design and analysis.  
  • Processing Subsystem, including superscalar out-of-order cores, multicore and heterogeneous processors, and purpose-specific accelerators.  
  • Design tools, such as microarchitecture simulators, RTL synthesis tools, and modeling for area, power, and thermal. 
  • FPGA platforms to compute acceleration.  
  • FPGAs technology, architecture and applications.  
  • Register-Transfer Level (RTL) hardware design.  
  • Planning and specification, writing Verilog models, and designing custom circuits and synthesized standard cell blocks.  
  • Using industrial CAD tools and flows for digital, analog/RF, or mixed-signal chip design.  
  • Full-chip integration and verification for tapeout.  
 
Annual base salary for this role in California, US is expected to be between $156,853 - $160,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.
 

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