Validation Engineer
Roseville, CA ยท On-site
A validation engineer develops a comprehensive test plan by utilizing design specifications ... debugging and problem-solving complex SOC is a must as well. Protocols knowledge PCIe or SAS/SATA ...
Roseville, CA ยท On-site
A validation engineer develops a comprehensive test plan by utilizing design specifications ... debugging and problem-solving complex SOC is a must as well. Protocols knowledge PCIe or SAS/SATA ...
Roseville, CA ยท On-site
A validation engineer develops a comprehensive test plan by utilizing design specifications ... debugging and problem-solving complex SOC is a must as well. Protocols knowledge PCIe or SAS/SATA ...
San Jose, CA ยท On-site
$170K - $220K/yr
... Debug & Validation Support * Lead root cause analysis and debugging of complex PCIe signal ... Partner with product management and engineering to translate customer feedback into product ...
San Jose, CA ยท On-site
$170K - $220K/yr
... Debug & Validation Support * Lead root cause analysis and debugging of complex PCIe signal ... Partner with product management and engineering to translate customer feedback into product ...
Verification Lead / Principal Verification Engineer - PCIe Gen5/Gen6 Location: San Jose, CA ... Support emulation, post-silicon debug, and silicon validation. * Lead and mentor verification ...
Verification Lead / Principal Verification Engineer - PCIe Gen5/Gen6 Location: San Jose, CA ... Support emulation, post-silicon debug, and silicon validation. * Lead and mentor verification ...
San Jose, CA ยท On-site
$170K - $220K/yr
... Debug & Validation Support * Lead root cause analysis and debugging of complex PCIe signal ... Partner with product management and engineering to translate customer feedback into product ...
San Jose, CA ยท On-site
$170K - $220K/yr
... Debug & Validation Support * Lead root cause analysis and debugging of complex PCIe signal ... Partner with product management and engineering to translate customer feedback into product ...
Debug & Optimization: Analyze and debug complex PHY, Link, and Transport layer issues during ... Validation: Experience in both preโsilicon and postโsilicon SoC validation. * Power Management:
Debug & Optimization: Analyze and debug complex PHY, Link, and Transport layer issues during ... Validation: Experience in both preโsilicon and postโsilicon SoC validation. * Power Management:
Austin, TX ยท On-site
$68K - $161K/yr
... debug engineer with expertise in complex server-class systems. This role is based onsite at the ... Familiarity with PCIE , DDR , USB , ETHRENET interfaces, design validation. * Proven expertise in ...
Austin, TX ยท On-site
$68K - $161K/yr
... debug engineer with expertise in complex server-class systems. This role is based onsite at the ... Familiarity with PCIE , DDR , USB , ETHRENET interfaces, design validation. * Proven expertise in ...
Austin, TX ยท On-site
The successful candidate will work as part of the post-silicon validation group; facilitating all ... Understanding of industry standard busses and their software stack, such as PCIe, CXL. * Strong ...
Austin, TX ยท On-site
The successful candidate will work as part of the post-silicon validation group; facilitating all ... Understanding of industry standard busses and their software stack, such as PCIe, CXL. * Strong ...
A validation engineer develops a comprehensive test plan by utilizing design specifications ... debugging and problem-solving complex SOC is a must as well. Protocols knowledge PCIe or SAS/SATA ...
A validation engineer develops a comprehensive test plan by utilizing design specifications ... debugging and problem-solving complex SOC is a must as well. Protocols knowledge PCIe or SAS/SATA ...
A validation engineer develops a comprehensive test plan by utilizing design specifications ... debugging and problem-solving complex SOC is a must as well. Protocols knowledge PCIe or SAS/SATA ...
A validation engineer develops a comprehensive test plan by utilizing design specifications ... debugging and problem-solving complex SOC is a must as well. Protocols knowledge PCIe or SAS/SATA ...
Analyze and validate TLP/DLLP handling, flow control, credit management, ordering rules, ACK/NAK ... Debug & Optimization: Analyze and debug complex PHY, Link, and Transport layer issues during bring ...
Analyze and validate TLP/DLLP handling, flow control, credit management, ordering rules, ACK/NAK ... Debug & Optimization: Analyze and debug complex PHY, Link, and Transport layer issues during bring ...
Roseville, CA ยท On-site
$65 - $100/hr
A validation engineer develops a comprehensive test plan by utilizing design specifications ... debugging and problem-solving complex SOC is a must as well. Protocols knowledge PCIe or SAS/SATA ...
Roseville, CA ยท On-site
$65 - $100/hr
A validation engineer develops a comprehensive test plan by utilizing design specifications ... debugging and problem-solving complex SOC is a must as well. Protocols knowledge PCIe or SAS/SATA ...
A validation engineer develops a comprehensive test plan by utilizing design specifications ... debugging and problem-solving complex SOC is a must as well. Protocols knowledge PCIe or SAS/SATA ...
A validation engineer develops a comprehensive test plan by utilizing design specifications ... debugging and problem-solving complex SOC is a must as well. Protocols knowledge PCIe or SAS/SATA ...
Austin, TX ยท On-site
$154K/yr
The successful candidate will work as part of the post-silicon validation group; facilitating all ... Understanding of industry standard busses and their software stack, such as PCIe, CXL. * Strong ...
Austin, TX ยท On-site
$154K/yr
The successful candidate will work as part of the post-silicon validation group; facilitating all ... Understanding of industry standard busses and their software stack, such as PCIe, CXL. * Strong ...
... debug engineer. Individual will be part of a team that will be responsible for Data Center ... GPU SOC (pcie, vr's, RMs, retimers, HBM, internal networking). Handling of Data Center related ...
... debug engineer. Individual will be part of a team that will be responsible for Data Center ... GPU SOC (pcie, vr's, RMs, retimers, HBM, internal networking). Handling of Data Center related ...
Austin, TX ยท On-site
$142K/yr
... debug engineer. Individual will be part of a team that will be responsible for Data Center ... GPU SOC (pcie, vr's, RMs, retimers, HBM, internal networking). Handling of Data Center related ...
Austin, TX ยท On-site
$142K/yr
... debug engineer. Individual will be part of a team that will be responsible for Data Center ... GPU SOC (pcie, vr's, RMs, retimers, HBM, internal networking). Handling of Data Center related ...
Rocklin, CA ยท On-site
$65 - $100/hr
A validation engineer develops a comprehensive test plan by utilizing design specifications ... debugging and problem-solving complex SOC is a must as well. Protocols knowledge PCIe or SAS/SATA ...
Rocklin, CA ยท On-site
$65 - $100/hr
A validation engineer develops a comprehensive test plan by utilizing design specifications ... debugging and problem-solving complex SOC is a must as well. Protocols knowledge PCIe or SAS/SATA ...
Rocklin, CA ยท On-site
A validation engineer develops a comprehensive test plan by utilizing design specifications ... debugging and problem-solving complex SOC is a must as well. Protocols knowledge PCIe or SAS/SATA ...
Rocklin, CA ยท On-site
A validation engineer develops a comprehensive test plan by utilizing design specifications ... debugging and problem-solving complex SOC is a must as well. Protocols knowledge PCIe or SAS/SATA ...
... debug support. The role requires close collaboration with Architecture, RTL Design, DFT, Firmware ... Validate: * Equalization sequences * Link training * Recovery behavior * Speed changes * Lane width ...
... debug support. The role requires close collaboration with Architecture, RTL Design, DFT, Firmware ... Validate: * Equalization sequences * Link training * Recovery behavior * Speed changes * Lane width ...
... debugging. What You'll Do * Protocol Stack Analysis: Understand PHY/Link architecture ... Analyze and validate TLP/DLLP handling, flow control, credit management, ordering rules, ACK/NAK ...
... debugging. What You'll Do * Protocol Stack Analysis: Understand PHY/Link architecture ... Analyze and validate TLP/DLLP handling, flow control, credit management, ordering rules, ACK/NAK ...
... debugging. What You'll Do * Protocol Stack Analysis: Understand PHY/Link architecture ... Analyze and validate TLP/DLLP handling, flow control, credit management, ordering rules, ACK/NAK ...
Quick apply
... debugging. What You'll Do * Protocol Stack Analysis: Understand PHY/Link architecture ... Analyze and validate TLP/DLLP handling, flow control, credit management, ordering rules, ACK/NAK ...
$22.60 - $27.64
2% of jobs
$27.64 - $32.69
6% of jobs
$32.69 - $37.74
13% of jobs
$39.32 is the 25th percentile. Wages below this are outliers.
$37.74 - $42.79
13% of jobs
$42.79 - $47.84
11% of jobs
The median wage is $50.36 / hr.
$47.84 - $52.88
12% of jobs
$52.88 - $57.93
9% of jobs
$61.82 is the 75th percentile. Wages above this are outliers.
$57.93 - $62.98
13% of jobs
$62.98 - $68.03
13% of jobs
$68.03 - $73.08
6% of jobs
$73.08 - $78.13
3% of jobs
$22
$51
$78
| Aspect | Validation Debug Engineer Pcie | Validation Engineer |
|---|---|---|
| Certifications | Relevant certifications like ISTQB, hardware validation courses | Similar certifications, often including ISTQB or industry-specific courses |
| Work Environment | Hardware labs, embedded systems, PCIe testing setups | System testing, software validation, hardware-software integration |
| Industry Usage | Semiconductor, hardware manufacturing, PCIe technology | Electronics, software, hardware validation across industries |
Validation Debug Engineer Pcie focuses on testing and debugging PCIe hardware interfaces, requiring specialized knowledge of PCIe protocols and hardware testing. Validation Engineer has a broader scope, covering various hardware and software validation tasks across different technologies. Both roles require similar certifications and work environments but differ in their specific technical focus and industry applications.
For Validation Debug Engineer Pcie jobs, the most frequently searched job titles are:

Roseville, CA โข On-site
Contractor
Medical, Dental, Vision, Life, Retirement, PTO
Re-posted 8 days ago
Description
Data Center Solutions Business Unit (DCS) delivers industry leading performance,
reliability, and security in Storage Controllers, Memory Controllers, NVMe SSD Controllers, PCIe
Switches and SAS Expanders that are applied in Cloud Storage and Compute Data Centers, and
Storage Area Networks.
As a System Validation Engineer, you will join a group of world class talented system integrators
responsible for the bring-up, integration and validation of cutting-edge System on a Chip (SoC)
products for the Data Center Solutions Business Unit.
A validation engineer is responsible for designing and building infrastructure that is required to
integrate and validate the SoC for its intended use models. This involves building the entire
prototype ecosystem like boards, FPGAs, FW, Software and Automation suites. And then further
integrating this environment with internally developed test equipment, protocol analyzers,
exercisers and x86 based HW.
A validation engineer develops a comprehensive test plan by utilizing design specifications,
marketing requirements and newly drafted standards including PCIe, CXL, DDR4/5, SAS, SATA,
NAND flash and other standards commonly used in Cloud Data and Compute Centers or
Storage Area Networks. Using validation infrastructure and the test plan, a validation engineer
develops and executes pre- and post-silicon tests that fully exercise the prototype SoC and
embedded FW.
The primary skill of validation engineers is to develop and integrate complex systems, test,
debug, and problem solve. On the job you will gain intimate understanding of relevant protocol
specifications, IP design and become expert in SOCs design/architecture, isolating problems,
and finding solutions. The job provides excellent opportunity to grow domain knowledge and
become an expert in these leading-edge fields.
The validation work environment offers opportunity to interact closely with other groups like
design, FW, pre-silicon emulation, verification, applications, and have a prospect for job rotation
or transfers within the company.
โข Building and maintaining validation infrastructure through the development of boards, FPGAs, embedded software, device drivers and test bench scripts.
โข Developing block, subsystem and system level test FW and scripts, and further integrating them in to best-in-class test automation suites.
โข Leading activities in area of technical expertise.
โข Running complex tests and conducting investigations in a lab environment onsite and remotely.
โข Finding and reporting bugs. Working with cross expertise teams and leading efforts to isolate, investigate and solve them.
โข Learning and dynamically applying knowledge of the device, system, protocols,and industry standards.
โข Effectively presenting technical information to internal and external groups.
โข Integrating prototype SOC HW and FW into a complete solution. This includes working with emulation platforms, proto-ICs, validation boards, FW and SW to bring an entire system level solution to life and enable functional testing and FW development.
โข Develop, execute, and document a series of feature tests that will fully validate the operation of the SoC and its various functional HW blocks and FW to ensure
all components and the overall SoC is functioning per design specs, achieves expected performance and meets industry requirements and standards.
Experience in IC and SoC functional validation
โข Demonstrate expertise in specific validation subject areas.
โข Experience working with prototype ICs, boards and HW infrastructure
โข Experience working in lab environment and knowledge of relevant test equipment and protocol analyzers.
โข Experience in debug and investigation of SoCโs using FW and MIPS debug environment
โข Strong knowledge of digital system and computer architecture
โข Strong knowledge of Data Communication and Digital Design theory
โข Strong knowledge of scripting language such as Python or Tcl/Tk, proficiency in C/C++ programming
โข Demonstrated strong analytical and problem-solving skills
Ability to develop and execute functional validation plans and necessary validation software and scripts with minimum supervision.
โข Working knowledge of PCIe and/or SAS/SATA protocols and ability to read and analyze protocol traces.
โข Familiarity with DDR4/5, I2C, SPI protocols is an asset
โข Experience in defining comprehensive test coverage at sub-block and system level utilizing design specification, feature requirements and industry standards
โข Ability to quickly learn new technologies, protocols, and standards
โข Comfortable working with developing specs and standards.
โข Team player working well with peers and cross functional groups.
โข Strong communications and interpersonal skills
โข Experience working in Linux and Windows based OS environments.
Skills
Validation, Debug, Automation testing
Top Skills Details
Validation,Debug,Automation testing
Additional Skills & Qualifications
Prior prototype SOC integration and validation experience is a must have.
Demonstrated experience testing, debugging and problem-solving complex SOC is a must as well.
Protocols knowledge PCIe or SAS/SATA are very important as well as experience capturing and reviewing protocol traces.
Defining test coverage and building, scripting and automating complex test benches
โข Building and maintaining validation infrastructure through the development of
boards, FPGAs, embedded software, device drivers and test bench scripts.
โข Developing block, subsystem and system level test FW and scripts, and further
integrating them in to best-in-class test automation suites.
โข Leading activities in area of technical expertise.
โข Running complex tests and conducting investigations in a lab environment onsite and remotely.
โข Finding and reporting bugs. Working with cross expertise teams and leading
efforts to isolate, investigate and solve them.
โข Learning and dynamically applying knowledge of the device, system, protocols,
and industry standards.
โข Effectively presenting technical information to internal and external groups.
โข Integrating prototype SOC HW and FW into a complete solution. This includes
working with emulation platforms, proto-ICs, validation boards, FW and SW to
bring an entire system level solution to life and enable functional testing and FW
development.
โข Develop, execute, and document a series of feature tests that will fully validate
the operation of the SoC and its various functional HW blocks and FW to ensure
all components and the overall SoC is functioning per design specs, achieves
expected performance and meets industry requirements and standards.
โข Experience in IC and SoC functional validation
Experience Level
Expert Level
Job Type & LocationThis is a Contract position based out of Roseville, CA.
Pay and BenefitsThe pay range for this position is $65.00 - $100.00/hr.
Individual compensation offered for this position within this range will depend on many factors, including qualifications, skills, relevant experience, job knowledge, geographic location, internal equity, and other pertinent job-related factors.
Eligibility requirements apply to some benefits and may depend on your job classification and length of employment. Benefits are subject to change and may be subject to specific elections, plan, or program terms. If eligible, the benefits available for this temporary role may include the following: โข Medical, dental & vision โข Critical Illness, Accident, and Hospital โข 401(k) Retirement Plan โ Pre-tax and Roth post-tax contributions available โข Life Insurance (Voluntary Life & AD&D for the employee and dependents) โข Short and long-term disability โข Health Spending Account (HSA) โข Transportation benefits โข Employee Assistance Program โข Time Off/Leave (PTO, Vacation or Sick Leave)
Workplace TypeThis is a fully onsite position in Roseville,CA.
Application DeadlineThis position is anticipated to close on Aug 31, 2026.
About TEKsystemsWe're partners in transformation. We help clients activate ideas and solutions to take advantage of a new world of opportunity. We are a team of 80,000 strong, working with over 6,000 clients, including 80% of the Fortune 500, across North America, Europe and Asia. As an industry leader in Full-Stack Technology Services, Talent Services, and real-world application, we work with progressive leaders to drive change. That's the power of true partnership. TEKsystems is an Allegis Group company.
The company is an equal opportunity employer and will consider all applications without regards to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law.
About TEKsystems and TEKsystems Global ServicesWeโre a leading provider of business and technology services. We accelerate business transformation for our customers. Our expertise in strategy, design, execution and operations unlocks business value through a range of solutions. Weโre a team of 80,000 strong, working with over 6,000 customers, including 80% of the Fortune 500 across North America, Europe and Asia, who partner with us for our scale, full-stack capabilities and speed. Weโre strategic thinkers, hands-on collaborators, helping customers capitalize on change and master the momentum of technology. Weโre building tomorrow by delivering business outcomes and making positive impacts in our global communities. TEKsystems and TEKsystems Global Services are Allegis Group companies. Learn more at TEKsystems.com.
The company is an equal opportunity employer and will consider all applications without regard to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law.
San Francisco Fair Chance Ordinance: Pursuant to the San Francisco Fair Chance Ordinance, for all positions located in the city and county of San Francisco, we will consider for employment qualified applicants with arrest and conviction records.
Massachusetts Lie Detector: It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.
Use of Artificial Intelligence (AI): We may use Artificial Intelligence (AI) to support parts of our hiring process, including sourcing, screening, and evaluating candidates. AI helps assess applications and qualifications, but final decisions are made by our hiring team. By applying, you acknowledge and agree that your application may be reviewed using AI tools.
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We're partners in transformation. We help clients activate ideas and solutions to take advantage of a new world of opportunity. We are a team of 80,000 strong, working with over 6,000 clients, including 80% of the Fortune 500, across North America, Europe and Asia. As an industry leader in Full-Stack Technology Services, Talent Services, and real-world application, we work with progressive leaders to drive change. That's the power of true partnership. TEKsystems is an Allegis Group company.
It services
1,001 - 5,000 Employees
Hanover, MD, US