As a Full Chip Integration Engineer, you will be participating in the physical design, integration ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
As a Full Chip Integration Engineer, you will be participating in the physical design, integration ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
As a Full Chip Integration Engineer, you will be participating in the physical design, integration ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
As a Full Chip Integration Engineer, you will be participating in the physical design, integration ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
Description As a Full Chip Integration Engineer, you will be participating in the physical design ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
Description As a Full Chip Integration Engineer, you will be participating in the physical design ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
PE CAD Engineering
San Jose, CA · On-site
$126.50K - $234.90K/yr
Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional CAD Infrastructure Engineer to join our Central CAD Team. Selected candidates will be joining some of the ...
New
PE CAD Engineering
San Jose, CA · On-site
$126.50K - $234.90K/yr
Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional CAD Infrastructure Engineer to join our Central CAD Team. Selected candidates will be joining some of the ...
New
CAD Engineer - PDV
$147.40K - $272.10K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
$147.40K - $272.10K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip ... Solid understanding of algorithms, computer architecture and computer science theory * Experienced ...
As a software engineer, you will craft highly efficient software to automate and facilitate chip ... Solid understanding of algorithms, computer architecture and computer science theory * Experienced ...
CAD Engineer - PDV
$147.40K - $272.10K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
$147.40K - $272.10K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
$147.40K - $272.10K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
$147.40K - $272.10K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
$113.51K - $190.90K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
$113.51K - $190.90K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
PE CAD Engineering
$126.50K - $234.90K/yr
Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional CAD Infrastructure Engineer to join our Central CAD Team. Selected candidates will be joining some of the brightest ...
New
PE CAD Engineering
$126.50K - $234.90K/yr
Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional CAD Infrastructure Engineer to join our Central CAD Team. Selected candidates will be joining some of the brightest ...
New
CAD Engineer - PDV
$147.40K - $272.10K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
$147.40K - $272.10K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
$147.40K - $272.10K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
$147.40K - $272.10K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
$113.51K - $190.90K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
$113.51K - $190.90K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
Description As a Full Chip Integration Engineer, you will be participating in the physical design ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
Description As a Full Chip Integration Engineer, you will be participating in the physical design ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
Front-End CAD Engineer
Cupertino, CA · On-site
$2K/mo
Ability to automate and optimize CAD workflows for chip design verification. * Ability to interface ... We do not have boundaries between engineering and research, and we expect all of our technical ...
Front-End CAD Engineer
Cupertino, CA · On-site
$2K/mo
Ability to automate and optimize CAD workflows for chip design verification. * Ability to interface ... We do not have boundaries between engineering and research, and we expect all of our technical ...
CAD Engineer - PDV
$113.51K - $190.90K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
$113.51K - $190.90K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
Front-End CAD Engineer
Cupertino, CA · On-site
$2K/mo
Ability to automate and optimize CAD workflows for chip design verification. * Ability to interface ... We do not have boundaries between engineering and research, and we expect all of our technical ...
Front-End CAD Engineer
Cupertino, CA · On-site
$2K/mo
Ability to automate and optimize CAD workflows for chip design verification. * Ability to interface ... We do not have boundaries between engineering and research, and we expect all of our technical ...
Ability to automate and optimize CAD workflows for chip design verification. * Ability to interface ... We do not have boundaries between engineering and research, and we expect all of our technical ...
Ability to automate and optimize CAD workflows for chip design verification. * Ability to interface ... We do not have boundaries between engineering and research, and we expect all of our technical ...
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Bachelor's degree in electrical engineering, computer engineering or computer science * 5+ years of ...
New
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Bachelor's degree in electrical engineering, computer engineering or computer science * 5+ years of ...
New
CAD Engineer - PDV
$147.40K - $272.10K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
$147.40K - $272.10K/yr
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
Trainee Computer Chip Engineer information
See salary details
$12.74 - $14.29
5% of jobs
$14.29 - $15.84
3% of jobs
$15.84 - $17.40
7% of jobs
$18.44 is the 25th percentile. Wages below this are outliers.
$17.40 - $18.95
14% of jobs
$18.95 - $20.50
9% of jobs
$20.50 - $22.05
7% of jobs
The median wage is $22.41 / hr.
$22.05 - $23.60
16% of jobs
$24.96 is the 75th percentile. Wages above this are outliers.
$23.60 - $25.15
15% of jobs
$25.15 - $26.70
7% of jobs
$26.70 - $28.26
11% of jobs
$28.26 - $29.81
5% of jobs
$12
$22
$29
How much do trainee computer chip engineer jobs pay per hour?
As of May 31, 2026, the average hourly pay for trainee computer chip engineer in the United States is $22.46, according to ZipRecruiter salary data. Most workers in this role earn between $18.51 and $26.20 per hour, depending on experience, location, and employer.
What cities are hiring for Trainee Computer Chip Engineer jobs? Cities with the most Trainee Computer Chip Engineer job openings:
What are the most commonly searched types of Computer Chip Engineer jobs? The most popular types of Computer Chip Engineer jobs are:
What states have the most Trainee Computer Chip Engineer jobs? States with the most job openings for Trainee Computer Chip Engineer jobs include:
Apple rating
8.1
Based on 661 frontline employees who took The Breakroom Quiz
6th of 30 rated technology retailers
Job description
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish! Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want join us in these pursuits? Join us to help deliver the next groundbreaking Apple product!..In this highly visible role, you will be at the center of a processor design effort interfacing with all disciplines, with a critical impact on getting functional products to millions of customers quickly.
As a Full Chip Integration Engineer, you will be participating in the physical design, integration, and verification of high performance, low power processor development. • Full chip floorplan, area optimizations, block partitioning and pin placements• Own chip level place and route (PnR), final CPU layout database construction and verification (PDV)• Develop and validate Power Grid, including routability analysis• Drive custom layout integration, block and full-chip level EM/IR, electrical verification/analysis as well as formal verification• Work with the implementation/CAD teams during the entire chip design cycle to drive signoff closure for tapeout• Work with the SOC team to meet IP technical and delivery requirements• Participate in establishing CAD and physical design methodologies and flow development for chip integration and analysis• Scripting to automate tasks and improve debug efficiency
Minimum BS and 10+ years of relevant industry experienceExperience with scripting in Perl or TCL
Knowledge of industrial standards and practices in Physical Design, including Floorplanning, Partitioning, Budgeting, Place and Route and Physical VerificationExperience in developing and implementing Power Grid and Clock specificationsSolid knowledge of Low Power Design, Physical Construction, Integration, EMIR (Drop/Noise), SIGEM Analysis, Formal Verification, Physical PDV, DRC/LVS Verification, and DFMSolid understanding of verification tools such as Conformal LP, LEC, RedHawk, CalibreSolid understanding of CMOS circuit design. Layout design background is a plusWorking knowledge of Extraction and STA methodology and toolsWorking knowledge of Computer ArchitectureAbility to work well in a team, being an excellent problem solver, and self motivated
As a Full Chip Integration Engineer, you will be participating in the physical design, integration, and verification of high performance, low power processor development. • Full chip floorplan, area optimizations, block partitioning and pin placements• Own chip level place and route (PnR), final CPU layout database construction and verification (PDV)• Develop and validate Power Grid, including routability analysis• Drive custom layout integration, block and full-chip level EM/IR, electrical verification/analysis as well as formal verification• Work with the implementation/CAD teams during the entire chip design cycle to drive signoff closure for tapeout• Work with the SOC team to meet IP technical and delivery requirements• Participate in establishing CAD and physical design methodologies and flow development for chip integration and analysis• Scripting to automate tasks and improve debug efficiency
Minimum BS and 10+ years of relevant industry experienceExperience with scripting in Perl or TCL
Knowledge of industrial standards and practices in Physical Design, including Floorplanning, Partitioning, Budgeting, Place and Route and Physical VerificationExperience in developing and implementing Power Grid and Clock specificationsSolid knowledge of Low Power Design, Physical Construction, Integration, EMIR (Drop/Noise), SIGEM Analysis, Formal Verification, Physical PDV, DRC/LVS Verification, and DFMSolid understanding of verification tools such as Conformal LP, LEC, RedHawk, CalibreSolid understanding of CMOS circuit design. Layout design background is a plusWorking knowledge of Extraction and STA methodology and toolsWorking knowledge of Computer ArchitectureAbility to work well in a team, being an excellent problem solver, and self motivated
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976