1

Temporary Hardware Verification Engineer Jobs in Texas

This role offers meaningful opportunities to collaborate with full-stack software, hardware, ASIC ... ASIC Engineer, Design Verification Responsibilities: * Define and implement block, IP, and SoC ...

Solid understanding of digital hardware Verilog HDL and Verification strategies including ... Low-level programming experience including C and Assembler. Experience with firmware debug and ...

Solid understanding of digital hardware Verilog HDL and Verification strategies including ... Low-level programming experience including C and Assembler. Experience with firmware debug and ...

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

Design Verification Engineer Looking for new challenges? Would you like the variety of a contract ... hardware development setting * Strong background in SystemVerilog and UVM verification ...

Solid understanding of digital hardware Verilog HDL and Verification strategies including ... Low-level programming experience including C and Assembler. Experience with firmware debug and ...

Apple's Hardware Technologies Formal Verification team is seeking an AI/ML Engineer to work at the intersection of Artificial Intelligence and Formal Verification. In this role, you will explore ...

Apple's Hardware Technologies Formal Verification team is seeking an AI/ML Engineer to work at the intersection of Artificial Intelligence and Formal Verification. In this role, you will explore ...

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

Design Verification Engineer Looking for new challenges? Would you like the variety of a contract ... hardware development setting * Strong background in SystemVerilog and UVM verification ...

ASIC Verification Engineer

Austin, TX · On-site

$140 - $210/hr

Design Verification Engineer - ASIC IP Company: Ericsson Silicon Location: Austin, Texas This is an ... Participate in hardware emulation and hardware acceleration verification * Drive SW-driven ...

New

Formal Verification Engineer

Austin, TX · On-site

$134K/yr

Description As a formal verification engineer working the complete formal verification for single ... Knowledge and experience in interpreting hardware specifications Temporal logic assertion-based ...

Formal Verification Engineer

Austin, TX · On-site

$134K/yr

Description As a formal verification engineer working the complete formal verification for single ... Knowledge and experience in interpreting hardware specifications. Temporal logic assertion-based ...

... in hardware emulation and hardware acceleration verification Drive SW-driven verification ... Developer Primary Recruiter: Jim Everett Compensation and Benefits at Ericsson At Ericsson, we know ...

... in hardware emulation and hardware acceleration verification Drive SW-driven verification ... Developer Primary Recruiter: Jim Everett Compensation and Benefits at Ericsson At Ericsson, we know ...

IP Verification Engineer

Austin, TX · On-site

$110 - $150/hr

SW‑Driven Verification - bridging the hardware/software boundary where the hardest bugs hide. * Team Leadership - mentoring engineers, influencing methodology, and shaping how the team grows.

New

Formal Verification Engineer

Austin, TX · On-site

$134K/yr

Description As a formal verification engineer working the complete formal verification for single ... Knowledge and experience in interpreting hardware specifications Proficiency in any scripting ...

Formal Verification Engineer

Austin, TX · On-site

$134K/yr

Description As a formal verification engineer working the complete formal verification for single ... Knowledge and experience in interpreting hardware specifications Proficiency in any scripting ...

Description As a formal verification engineer working the complete formal verification for single ... Knowledge and experience in interpreting hardware specifications * Temporal logic assertion-based ...

Design Verification Engineer

Austin, TX · On-site

$120K - $225K/yr

Because today's AI workloads are too large and intricate to be fully verified in hardware alone ... We welcome engineers at all levels of experience who are eager to tackle challenging verification ...

Showing results 21-40

Temporary Hardware Verification Engineer information

What is the difference between Temporary Hardware Verification Engineer vs Hardware Design Engineer?

AspectTemporary Hardware Verification EngineerHardware Design Engineer
CredentialsBachelor's in Electrical Engineering or related; familiarity with verification toolsBachelor's or Master's in Electrical Engineering; focus on design tools
Work EnvironmentTesting labs, verification teams, collaborative projectsDesign labs, CAD environments, project planning
Industry UsageSemiconductor, electronics manufacturing, tech companiesSemiconductor, consumer electronics, hardware startups
Search IntentVerification, testing, validation rolesDesign, development, architecture roles

The Temporary Hardware Verification Engineer primarily focuses on testing and validating hardware components to ensure functionality and reliability. In contrast, the Hardware Design Engineer is responsible for creating and developing hardware designs. Both roles require technical skills in electrical engineering, but their core responsibilities differ, with verification emphasizing testing and validation, and design emphasizing creation and development.

What are the most commonly searched types of Hardware Verification Engineer jobs in Texas?

The most popular types of Hardware Verification Engineer jobs in Texas are:

What are popular job titles related to Temporary Hardware Verification Engineer jobs in Texas?

For Temporary Hardware Verification Engineer jobs in Texas, the most frequently searched job titles are:

What job categories do people searching Temporary Hardware Verification Engineer jobs in Texas look for?

The top searched job categories for Temporary Hardware Verification Engineer jobs in Texas are:

What cities in Texas are hiring for Temporary Hardware Verification Engineer jobs?

Cities in Texas with the most Temporary Hardware Verification Engineer job openings:

ASIC Engineer, Design Verification

Meta

Austin, TX • On-site, Remote

$114K/yr

Full-time

Re-posted 18 days ago


Meta rating

7.8

Company rating: 7.8 out of 10

Based on 45 frontline employees who took The Breakroom Quiz

137th of 245 rated software companies


Job description

Meta is hiring an ASIC Design Verification Engineer within the Infrastructure Silicon organization. We are looking for individuals with experience in Design Verification to build IP and System on Chip (SoC) solutions for data center applications.In this role, you will work alongside experienced engineers focused on developing advanced ASIC solutions that power Meta's data center infrastructure. You will own verification closure for design modules or sub-systems, spanning test planning, UVM-based testbench development, and coverage closure. In addition to simulation-based verification, you will leverage formal verification and emulation methodologies to achieve bug-free silicon. This role offers meaningful opportunities to collaborate with full-stack software, hardware, ASIC design, emulation, and post-silicon validation teams toward first-pass silicon success.
ASIC Engineer, Design Verification Responsibilities:
  • Define and implement block, IP, and SoC-level verification plans to enable comprehensive functional coverage across design hierarchies
  • Develop and maintain UVM-based testbenches and functional test sequences aligned to the verification test plan
  • Drive verification closure using defined metrics including functional coverage, code coverage, and assertion coverage
  • Debug and root-cause functional failures in RTL designs, partnering closely with the ASIC design team to resolve issues
  • Apply formal verification and emulation techniques to complement simulation-based approaches and improve verification efficiency
  • Collaborate with design, architecture, and post-silicon validation teams to align on verification goals and ensure design quality
  • Develop reusable verification infrastructure components including scoreboards, monitors, and coverage models
  • Contribute to scripting and automation flows using Python, TCL, or Shell to improve verification productivity and regression management
  • Participate in design reviews and verification planning discussions to identify potential design risks early in the development cycle

Minimum Qualifications:
  • Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta
  • 2+ years of hands-on experience in SystemVerilog and UVM-based verification methodology or C/C++ based hardware verification
  • 2+ years of experience in block, IP, sub-system, or SoC-level verification using SystemVerilog UVM or OVM methodologies
  • Experience with EDA simulation tools and scripting languages such as Python, TCL, Perl, or Shell for building verification environments and flows
  • Experience debugging RTL functional failures and performing root-cause analysis in a simulation or emulation environment

Preferred Qualifications:
  • Experience with Emulation platform usage for Pre-Si verification
  • Experience verifying ARM or RISC-V based sub-systems or SoCs, or data center application designs such as AI/ML accelerators, networking, or video processing ASICs
  • Experience with IP or integration verification of high-speed interfaces such as PCIe, DDR, or Ethernet
  • Experience developing UVM-based verification environments from scratch, including environment architecture, sequencers, and coverage models
  • Experience with Chip Debug Logic, Telemetry and/or RAS

About Meta:
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.
$114,000/year to $172,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.

What Meta employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom