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Temporary Asic Rtl Design Engineer Jobs in Munster, IN

Senior FPGA Engineer (Algo)

Chicago, IL · On-site

$150K - $250K/yr

Solid Hardware Engineering experience, especially with FPGA * Highly autonomous with a can-do ... Strong skills in RTL logic design (Verilog) and verification; 2+ years of experience writing ...

We are currently seeking a FPGA Engineer to join one of our trading teams. While DRW has been ... Strong skills in RTL logic design (Verilog) and verification; 2+ years of experience writing ...

Enhance your knowledge of trading, algorithm complexity, system design, and coding * Work within ... Proficient in SystemVerilog, Verilog, VHDL, or other RTL programming (additional software ...

Enhance your knowledge of trading, algorithm complexity, system design, and coding * Work within ... Proficient in SystemVerilog, Verilog, VHDL, or other RTL programming (additional software ...

FPGA Developer

Chicago, IL · On-site

$202.50 - $247.50/hr

Design, develop, test and deploy proprietary software including: * Ultra-low-latency trading ... Skills in data processing and algorithm development in RTL * A strong grasp of data structures, and ...

New

FPGA Developer

Chicago, IL · On-site

$225K/yr

Design, develop, test and deploy proprietary software including: * Ultra-low-latency trading ... Skills in data processing and algorithm development in RTL * A strong grasp of data structures, and ...

Senior API Engineer Azure Location: Chicago, IL(Hybrid) Role Overview We are seeking a Senior API ... Design, develop, secure, deploy, and support scalable REST APIs and services on Azure . * Develop ...

New

This role works closely with Project Engineers and Project Managers to develop construction ... If eligible, the benefits available for this temporary role may include the following: * Medical ...

New

Experience with CAD / 3D printing * Familiarity with lab equipment (e.g. oscilloscopes, probes ... Experience with FPGA / RTL (e.g. SystemVerilog, UVM, cocotb) Benefits * Close mentorship and ...

Structural Engineer

Chicago, IL · On-site

$80K - $85K/yr

Support evaluation and design efforts for structural steel, reinforced concrete, dams, excavation ... Ability to travel on temporary assignments. We are GEI. Some of the world's most pressing problems ...

Support evaluation and design efforts for structural steel, reinforced concrete, dams, excavation ... Ability to travel on temporary assignments. We are GEI. Some of the world's most pressing problems ...

Structural Engineer

Chicago, IL · Hybrid

$80K - $85K/yr

Support evaluation and design efforts for structural steel, reinforced concrete, dams, excavation ... Ability to travel on temporary assignments. We are GEI. Some of the world's most pressing problems ...

Support evaluation and design efforts for structural steel, reinforced concrete, dams, excavation ... Ability to travel on temporary assignments. We are GEI. Some of the world's most pressing problems ...

Showing results 21-40

Temporary Asic Rtl Design Engineer information

See Munster, IN salary details

$91.7K

$146.6K

$197.1K

How much do temporary asic rtl design engineer jobs pay per year?

As of Aug 20, 2026, the average yearly pay for temporary asic rtl design engineer in Munster, IN is $146,575.00, according to ZipRecruiter salary data. Most workers in this role earn between $128,300.00 and $175,700.00 per year, depending on experience, location, and employer.

What is the difference between Temporary Asic Rtl Design Engineer vs Temporary FPGA Design Engineer?

AspectTemporary Asic Rtl Design EngineerTemporary FPGA Design Engineer
Primary FocusDesigning RTL code for ASIC chipsDesigning FPGA logic and configurations
Skills & CertificationsVerilog/VHDL, ASIC design flow, simulation toolsVerilog/VHDL, FPGA development tools, synthesis
Work EnvironmentSemiconductor companies, ASIC design teamsFPGA development labs, prototyping environments
Industry UsageUsed in high-volume chip manufacturingUsed for prototyping, testing, and low-volume products

Both roles involve RTL design using Verilog or VHDL, but the Temporary Asic Rtl Design Engineer focuses on ASIC chip development, while the Temporary FPGA Design Engineer specializes in FPGA-based prototyping and testing. The choice depends on whether the project aims for mass production or flexible, rapid development.

Infographic showing various Temporary Asic Rtl Design Engineer job openings in Munster, IN as of June 2026, with employment types broken down into 67% Full Time, and 33% Part Time. Highlights an 98% Physical, 1% Hybrid, and 1% Remote job distribution, with an average salary of $146,575 per year, or $70.5 per hour.

Hardware Engineer Intern - Summer 2027

IMC

Chicago, IL • On-site

$200K/yr

Full-time, Temporary, Internship

PTO

Re-posted 18 days ago


Job description

Our 10-week internship is your chance to experience life as a Hardware Engineer at IMC. You'll have the support you need to succeed: educational training and a mentor who will oversee your work and professional development. We provide a highly competitive compensation package with accommodations included. The bar for talent at IMC is high and interns who meet our performance expectations will have the opportunity to secure a full time Graduate Hardware Engineer position at the end of the program.  Where you go from here is up to you!

Your Core Responsibilities:

  • Enhance your knowledge of algorithm complexity, professional design, and coding
  • Work on meaningful and challenging projects
  • Patricipate in classroom-based training covering an overview of financial markets, IMC technology and hardware design
  • Build valuable connections in an environment that recognizes and rewards problem solving, innovation and teamwork
  • Engage in professional development sessions aimed at helping you envision your future at IMC
  • Attend a full schedule of events and social activities throughout the summer

Your Skills and Experience:

  • Current university student graduating between September 2027 - July 2028 that is pursuing an Electrical Engineering, Computer Engineering, or a related degree
  • Must have proficient experience in Verilog, SystemVerilog, VHDL or other RTL programming (additional software experience is a plus; C++, Python, or similar)
  • Strong analytical skills and interest in solving complex problems programmatically
  • Desire to collaborate with technical and non-technical teammates in a dynamic environment
  • Interest in the Financial Markets; previous knowledge is NOT required
  • Must be able to start internship on June 7, 2027

You may submit one application per role each year.  We strongly encourage you to focus on applying to a single role that best matches your skills and interests.  Though you may apply to multiple roles, please note that each application will be evaluated based on the specific criteria established for that particular role. If you have already applied for this position during the current recruitment season and were not selected, you may reapply when the next recruitment season begins in 2027.

The Base Salary range for the role is included below. Base salary is only one component of total compensation; all full-time, permanent positions are eligible for a discretionary bonus and benefits, including paid leave and insurance. Please visit Benefits - US | IMC Trading for more comprehensive information.

Base Salary: $200,000