Hardware Engineer
Chicago, IL ยท On-site
$127K - $168K/yr
Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...
Chicago, IL ยท On-site
$127K - $168K/yr
Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...
Chicago, IL ยท On-site
$127K - $168K/yr
Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...
Chicago, IL ยท On-site
$127K - $167K/yr
Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...
Chicago, IL ยท On-site
$127K - $167K/yr
Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...
$127K - $167K/yr
Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...
$127K - $167K/yr
Design and implement RTL for next-generation ASIC platforms using SystemVerilog * Contribute to architecture and design discussions for performance-critical hardware systems * Develop new ...
Chicago, IL ยท On-site
$145K/yr
Develop and maintain RTL in Verilog/SystemVerilog * Write and maintain verification environments ... or ASIC digital logic design - network traffic experience a strong plus * Deep Verilog ...
Chicago, IL ยท On-site
$145K/yr
Develop and maintain RTL in Verilog/SystemVerilog * Write and maintain verification environments ... or ASIC digital logic design - network traffic experience a strong plus * Deep Verilog ...
Chicago, IL ยท On-site
Our team spans trading, engineering, and business operations, working together to build and support ... Design, implement, and verify RTL logic in Verilog or SystemVerilog targeting ultra-low-latency ...
Chicago, IL ยท On-site
Our team spans trading, engineering, and business operations, working together to build and support ... Design, implement, and verify RTL logic in Verilog or SystemVerilog targeting ultra-low-latency ...
Chicago, IL ยท On-site
$250K/yr
Experience with FPGA or other hardware/systems design and development * Experience with RTL (SystemVerilog/Verilog/VHDL) * Previous internship experience in hardware or low-level software engineering
Chicago, IL ยท On-site
$250K/yr
Experience with FPGA or other hardware/systems design and development * Experience with RTL (SystemVerilog/Verilog/VHDL) * Previous internship experience in hardware or low-level software engineering
Experience with FPGA or other hardware/systems design and development * Experience with RTL (SystemVerilog/Verilog/VHDL) * Previous internship experience in hardware or low-level software engineering
Experience with FPGA or other hardware/systems design and development * Experience with RTL (SystemVerilog/Verilog/VHDL) * Previous internship experience in hardware or low-level software engineering
Chicago, IL ยท On-site
$180K - $280K/yr
We are looking for talented hardware engineers with a track record of achievement in any domain ... Develop RTL on the latest FPGAs with modern design flows * Following through into production ...
Chicago, IL ยท On-site
$180K - $280K/yr
We are looking for talented hardware engineers with a track record of achievement in any domain ... Develop RTL on the latest FPGAs with modern design flows * Following through into production ...
Chicago, IL ยท On-site
$70K - $80K/yr
Carry out drafting and design assignments; assist Project Engineer, Mechanical/Electrical Engineer ... LaSalle Network is the leading provider of direct hire and temporary staffing services. For over ...
Chicago, IL ยท On-site
$70K - $80K/yr
Carry out drafting and design assignments; assist Project Engineer, Mechanical/Electrical Engineer ... LaSalle Network is the leading provider of direct hire and temporary staffing services. For over ...
Chicago, IL ยท On-site
$70K - $80K/yr
Carry out drafting and design assignments; assist Project Engineer, Mechanical/Electrical Engineer ... LaSalle Network is the leading provider of direct hire and temporary staffing services. For over ...
Chicago, IL ยท On-site
$70K - $80K/yr
Carry out drafting and design assignments; assist Project Engineer, Mechanical/Electrical Engineer ... LaSalle Network is the leading provider of direct hire and temporary staffing services. For over ...
$180K - $280K/yr
We are looking for talented hardware engineers with a track record of achievement in any domain ... Develop RTL on the latest FPGAs with modern design flows * Following through into production ...
$180K - $280K/yr
We are looking for talented hardware engineers with a track record of achievement in any domain ... Develop RTL on the latest FPGAs with modern design flows * Following through into production ...
Chicago, IL ยท On-site
$133K - $172K/yr
Description Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...
Chicago, IL ยท On-site
$133K - $172K/yr
Description Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...
Chicago, IL ยท On-site
$131K - $175K/yr
Develop testable, performant, and scalable RTL using SpinalHDL. * Support hands on tuning and ... Participate in design, code, and data reviews. Requirements REQUIREMENTS * Bachelor's degree in ...
Quick apply
Chicago, IL ยท On-site
$131K - $175K/yr
Develop testable, performant, and scalable RTL using SpinalHDL. * Support hands on tuning and ... Participate in design, code, and data reviews. Requirements REQUIREMENTS * Bachelor's degree in ...
$131K - $175K/yr
Develop testable, performant, and scalable RTL using SpinalHDL. * Support hands on tuning and ... Participate in design, code, and data reviews. Requirements REQUIREMENTS * Bachelor's degree in ...
$131K - $175K/yr
Develop testable, performant, and scalable RTL using SpinalHDL. * Support hands on tuning and ... Participate in design, code, and data reviews. Requirements REQUIREMENTS * Bachelor's degree in ...
Enhance your knowledge of trading, algorithm complexity, system design, and coding * Work within ... Proficient in SystemVerilog, Verilog, VHDL, or other RTL programming (additional software ...
Enhance your knowledge of trading, algorithm complexity, system design, and coding * Work within ... Proficient in SystemVerilog, Verilog, VHDL, or other RTL programming (additional software ...
$120K - $170K/yr
Wolverine Trading is seeking an experienced FPGA Engineer to build high-speed, low latency systems ... design and debug is a plus * 4+ years experience working with FPGA and/or ASIC designs required
$120K - $170K/yr
Wolverine Trading is seeking an experienced FPGA Engineer to build high-speed, low latency systems ... design and debug is a plus * 4+ years experience working with FPGA and/or ASIC designs required
Chicago, IL ยท On-site
$120K - $170K/yr
Description Wolverine Trading is seeking an experienced FPGA Engineer to build high-speed, low ... design and debug is a plus * 4+ years experience working with FPGA and/or ASIC designs required
Quick apply
Chicago, IL ยท On-site
$120K - $170K/yr
Description Wolverine Trading is seeking an experienced FPGA Engineer to build high-speed, low ... design and debug is a plus * 4+ years experience working with FPGA and/or ASIC designs required
Chesterton, IN ยท On-site
$95K - $125K/yr
... construction temporary works projects. The ideal candidate will have experience in bridge ... Prepares complete engineering plans or reports. * Uses computer assisted engineering and design ...
Chesterton, IN ยท On-site
$95K - $125K/yr
... construction temporary works projects. The ideal candidate will have experience in bridge ... Prepares complete engineering plans or reports. * Uses computer assisted engineering and design ...
... construction temporary works projects. The ideal candidate will have experience in bridge ... Prepares complete engineering plans or reports. * Uses computer assisted engineering and design ...
... construction temporary works projects. The ideal candidate will have experience in bridge ... Prepares complete engineering plans or reports. * Uses computer assisted engineering and design ...
Enhance your knowledge of algorithm complexity, professional design, and coding * Work on ... Must have proficient experience in Verilog, SystemVerilog, VHDL or other RTL programming ...
Enhance your knowledge of algorithm complexity, professional design, and coding * Work on ... Must have proficient experience in Verilog, SystemVerilog, VHDL or other RTL programming ...
$91.7K - $101.3K
16% of jobs
$101.3K - $110.9K
3% of jobs
$110.9K - $120.5K
4% of jobs
$123.3K is the 25th percentile. Wages below this are outliers.
$120.5K - $130.1K
6% of jobs
The median wage is $136.1K / yr.
$130.1K - $139.6K
33% of jobs
$139.6K - $149.2K
3% of jobs
$149.2K - $158.8K
2% of jobs
$165.1K is the 75th percentile. Wages above this are outliers.
$158.8K - $168.4K
12% of jobs
$168.4K - $178K
5% of jobs
$178K - $187.5K
4% of jobs
$187.5K - $197.1K
12% of jobs
$91.7K
$146.6K
$197.1K
| Aspect | Temporary Asic Rtl Design Engineer | Temporary FPGA Design Engineer |
|---|---|---|
| Primary Focus | Designing RTL code for ASIC chips | Designing FPGA logic and configurations |
| Skills & Certifications | Verilog/VHDL, ASIC design flow, simulation tools | Verilog/VHDL, FPGA development tools, synthesis |
| Work Environment | Semiconductor companies, ASIC design teams | FPGA development labs, prototyping environments |
| Industry Usage | Used in high-volume chip manufacturing | Used for prototyping, testing, and low-volume products |
Both roles involve RTL design using Verilog or VHDL, but the Temporary Asic Rtl Design Engineer focuses on ASIC chip development, while the Temporary FPGA Design Engineer specializes in FPGA-based prototyping and testing. The choice depends on whether the project aims for mass production or flexible, rapid development.
