If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
RTL Design Engineer
Cary, NC · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
RTL Design Engineer
Cary, NC · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
RTL Design Engineer
Cary, NC · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
RTL Design Engineer
Cary, NC · On-site
If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design ...
NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading ... You are expected to own micro-architecture, implement RTL, and deliver a fully verified, synthesis ...
New
NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading ... You are expected to own micro-architecture, implement RTL, and deliver a fully verified, synthesis ...
New
NVIDIA is seeking ASIC Design Engineers with experience in agentic AI to help design and implement ... Experience in micro-architecture and RTL development (Verilog) in complex designs. * Deep ...
NVIDIA is seeking ASIC Design Engineers with experience in agentic AI to help design and implement ... Experience in micro-architecture and RTL development (Verilog) in complex designs. * Deep ...
We are now looking for an ASIC Design Efficiency Engineer! NVIDIA is seeking extraordinary ... Execute and deliver fully verified, high performance, area and power efficient RTL to achieve ...
We are now looking for an ASIC Design Efficiency Engineer! NVIDIA is seeking extraordinary ... Execute and deliver fully verified, high performance, area and power efficient RTL to achieve ...
US_East | Infrastructure Engineer_L3
Knightdale, NC · On-site
$90/hr
RTL Design Engineer Work Location Raleigh, NC Rate: $90/hr AI Please send it with this information Legal name: Location (City and State): Relocate? Rate: Availability: Phone #: Mobile#: Email address:
US_East | Infrastructure Engineer_L3
Knightdale, NC · On-site
$90/hr
RTL Design Engineer Work Location Raleigh, NC Rate: $90/hr AI Please send it with this information Legal name: Location (City and State): Relocate? Rate: Availability: Phone #: Mobile#: Email address:
Senior ASIC Verification Engineer This role has been designed as 'Hybrid' with a requirement that ... highquality RTL, and work closely with verification and physical design teams to deliver clean ...
Senior ASIC Verification Engineer This role has been designed as 'Hybrid' with a requirement that ... highquality RTL, and work closely with verification and physical design teams to deliver clean ...
Senior ASIC Verification Engineer This role has been designed as 'Hybrid' with a requirement that ... highquality RTL, and work closely with verification and physical design teams to deliver clean ...
Senior ASIC Verification Engineer This role has been designed as 'Hybrid' with a requirement that ... highquality RTL, and work closely with verification and physical design teams to deliver clean ...
Senior ASIC Verification Engineer This role has been designed as 'Hybrid' with a requirement that ... highquality RTL, and work closely with verification and physical design teams to deliver clean ...
Senior ASIC Verification Engineer This role has been designed as 'Hybrid' with a requirement that ... highquality RTL, and work closely with verification and physical design teams to deliver clean ...
... custom/ASIC products involving Chip I/O, shared memory, and embedded processors * RTL design ... team of engineers * Excellent verbal and written communication * Discipline and rigor in ...
... custom/ASIC products involving Chip I/O, shared memory, and embedded processors * RTL design ... team of engineers * Excellent verbal and written communication * Discipline and rigor in ...
... custom/ASIC products involving Chip I/O, shared memory, and embedded processors * RTL design ... team of engineers * Excellent verbal and written communication * Discipline and rigor in ...
... custom/ASIC products involving Chip I/O, shared memory, and embedded processors * RTL design ... team of engineers * Excellent verbal and written communication * Discipline and rigor in ...
ASIC Design and Verification Engineer - AI
$131K - $160K/yr
ASIC Design and Verification Engineer - AIThe semiconductor industry is rapidly adopting AI for ... Experience with synthesizable RTL development * Experience with debugging of RTL and gate ...
ASIC Design and Verification Engineer - AI
$131K - $160K/yr
ASIC Design and Verification Engineer - AIThe semiconductor industry is rapidly adopting AI for ... Experience with synthesizable RTL development * Experience with debugging of RTL and gate ...
We are now looking for a Senior ASIC Engineer! NVIDIA is searching for an outstanding ASIC Engineer ... As a Senior Design Engineer at NVIDIA, you will be responsible for the development and micro ...
We are now looking for a Senior ASIC Engineer! NVIDIA is searching for an outstanding ASIC Engineer ... As a Senior Design Engineer at NVIDIA, you will be responsible for the development and micro ...
We are now looking for a Senior ASIC Engineer! NVIDIA is searching for an outstanding ASIC Engineer ... As a Senior Design Engineer at NVIDIA, you will be responsible for the development and micro ...
We are now looking for a Senior ASIC Engineer! NVIDIA is searching for an outstanding ASIC Engineer ... As a Senior Design Engineer at NVIDIA, you will be responsible for the development and micro ...
ASIC Verification Engineer (Remote - USA)
Raleigh, NC · Remote
$120K - $135K/yr
ASIC Verification Engineer Full-time: Salary + Benefits + Bonuses | Contractor Opportunities ... sophisticated RTL issues, and collaborate with experienced engineers across design, software ...
Quick apply
ASIC Verification Engineer (Remote - USA)
Raleigh, NC · Remote
$120K - $135K/yr
ASIC Verification Engineer Full-time: Salary + Benefits + Bonuses | Contractor Opportunities ... sophisticated RTL issues, and collaborate with experienced engineers across design, software ...
ASIC Verification Engineer (Remote - USA)
Raleigh, NC · On-site +1
$120K - $135K/yr
ASIC Verification Engineer Full-time: Salary + Benefits + Bonuses | Contractor Opportunities ... sophisticated RTL issues, and collaborate with experienced engineers across design, software ...
ASIC Verification Engineer (Remote - USA)
Raleigh, NC · On-site +1
$120K - $135K/yr
ASIC Verification Engineer Full-time: Salary + Benefits + Bonuses | Contractor Opportunities ... sophisticated RTL issues, and collaborate with experienced engineers across design, software ...
Staff Engineer - Digital ASIC and Signal Processing Chip Architect/Systems Engineer
Durham, NC · On-site
Staff Engineer - Digital ASIC and Signal Processing Chip Architect/Systems Engineer About the Role ... Expertise in digital signal processing, RTL design, and digital architecture. * Strong knowledge of:
Staff Engineer - Digital ASIC and Signal Processing Chip Architect/Systems Engineer
Durham, NC · On-site
Staff Engineer - Digital ASIC and Signal Processing Chip Architect/Systems Engineer About the Role ... Expertise in digital signal processing, RTL design, and digital architecture. * Strong knowledge of:
Staff Engineer - Digital ASIC and Signal Processing Chip Architect/Systems Engineer About the Role ... Expertise indigital signal processing,RTL design, anddigital architecture. * Strong knowledge of:
Staff Engineer - Digital ASIC and Signal Processing Chip Architect/Systems Engineer About the Role ... Expertise indigital signal processing,RTL design, anddigital architecture. * Strong knowledge of:
Temporary Asic Rtl Design Engineer information
What is the difference between Temporary Asic Rtl Design Engineer vs Temporary FPGA Design Engineer?
| Aspect | Temporary Asic Rtl Design Engineer | Temporary FPGA Design Engineer |
|---|---|---|
| Primary Focus | Designing RTL code for ASIC chips | Designing FPGA logic and configurations |
| Skills & Certifications | Verilog/VHDL, ASIC design flow, simulation tools | Verilog/VHDL, FPGA development tools, synthesis |
| Work Environment | Semiconductor companies, ASIC design teams | FPGA development labs, prototyping environments |
| Industry Usage | Used in high-volume chip manufacturing | Used for prototyping, testing, and low-volume products |
Both roles involve RTL design using Verilog or VHDL, but the Temporary Asic Rtl Design Engineer focuses on ASIC chip development, while the Temporary FPGA Design Engineer specializes in FPGA-based prototyping and testing. The choice depends on whether the project aims for mass production or flexible, rapid development.
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Apple rating
8.0
Based on 675 frontline employees who took The Breakroom Quiz
7th of 30 rated technology retailers
Job description
At Apple, we work every day to craft products that enrich people’s lives. If you’re passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design career and challenge yourself in a technical and multi-disciplinary endeavor? If so, this is an exciting position in the world class Apple mixed-signal silicon design team!
This role will build upon your solid foundation in digital logic circuits while introducing mixed signal and analog circuit design and features. You will work with a variety of flows fundamental to modern silicon engineering: modeling and integrating high-performance mixed-signal and analog IPs into high-speed digital circuits. This is an excellent opportunity to gain valuable experience in software methods and analysis, which are increasingly crucial across the semiconductor industry.
As a member of our dynamic team, you will have the exceptional opportunity to help create the next generation of products that will delight and inspire millions of Apple customers every day. You will work to specify, design, verify, and support lab bring-up of sophisticated digital and mixed-signal circuits.
Description
In this job you will be responsible for specifying and/or micro-architecting digital blocks in sophisticated mixed-signal circuits. You will be responsible for RTL coding of blocks specified by you or others. You will also participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design verification team. You will contribute to the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, etc.
Preferred Qualifications
Proven knowledge of RTL design, Verilog and SystemVerilog
Deep knowledge of front-end tools (Verilog simulators, linters, CDC, RDC, LEQ, UPF)
Low power design methodologies and techniques to reduce dynamic and static IC power
ECO design flows and methodologies
Proven understanding of mixed signal concepts and experience with analog circuit behavioral modeling
Proven knowledge of synthesis, static timing and DFT
Proven knowledge of SystemVerilog assertions, checkers, and other design verification techniques
Knowledge of scripting languages (i.e. Perl, JSON and Python)
Using GenAI tools (e.g., large language models, AI-assisted code generation) to design, validate, and optimize SystemVerilog RTL code
Digital signal processing fundamentals including signal processing concepts
Strong communication and presentation skills
Minimum Qualifications
Bachelors of Science in Electrical Engineering.
This role will build upon your solid foundation in digital logic circuits while introducing mixed signal and analog circuit design and features. You will work with a variety of flows fundamental to modern silicon engineering: modeling and integrating high-performance mixed-signal and analog IPs into high-speed digital circuits. This is an excellent opportunity to gain valuable experience in software methods and analysis, which are increasingly crucial across the semiconductor industry.
As a member of our dynamic team, you will have the exceptional opportunity to help create the next generation of products that will delight and inspire millions of Apple customers every day. You will work to specify, design, verify, and support lab bring-up of sophisticated digital and mixed-signal circuits.
Description
In this job you will be responsible for specifying and/or micro-architecting digital blocks in sophisticated mixed-signal circuits. You will be responsible for RTL coding of blocks specified by you or others. You will also participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design verification team. You will contribute to the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, etc.
Preferred Qualifications
Proven knowledge of RTL design, Verilog and SystemVerilog
Deep knowledge of front-end tools (Verilog simulators, linters, CDC, RDC, LEQ, UPF)
Low power design methodologies and techniques to reduce dynamic and static IC power
ECO design flows and methodologies
Proven understanding of mixed signal concepts and experience with analog circuit behavioral modeling
Proven knowledge of synthesis, static timing and DFT
Proven knowledge of SystemVerilog assertions, checkers, and other design verification techniques
Knowledge of scripting languages (i.e. Perl, JSON and Python)
Using GenAI tools (e.g., large language models, AI-assisted code generation) to design, validate, and optimize SystemVerilog RTL code
Digital signal processing fundamentals including signal processing concepts
Strong communication and presentation skills
Minimum Qualifications
Bachelors of Science in Electrical Engineering.
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976