Experience with RTL design (SystemVerilog/VHDL) and logic integration. * Familiarity with ... * 5+ years DRAM or ASIC DFT Design or Verification experience. Preferred Qualifications:
Experience with RTL design (SystemVerilog/VHDL) and logic integration. * Familiarity with ... * 5+ years DRAM or ASIC DFT Design or Verification experience. Preferred Qualifications:
Principal Engineer, Digital Design (IO Subsystem)
Allen, TX · On-site
$120 - $160/hr
The Principal Engineer will serve as the technical leader for the IO subsystem, driving architecture, RTL implementation, and design automation strategy, while partnering closely with system ...
Principal Engineer, Digital Design (IO Subsystem)
Allen, TX · On-site
$120 - $160/hr
The Principal Engineer will serve as the technical leader for the IO subsystem, driving architecture, RTL implementation, and design automation strategy, while partnering closely with system ...
Experience with FPGA's (Xilinx/Altera), RTL design (Verilog/VHDL), and simulation tools ... Experience with Digital ASIC Design and Design Process * Experience with Testbench Generation
Experience with FPGA's (Xilinx/Altera), RTL design (Verilog/VHDL), and simulation tools ... Experience with Digital ASIC Design and Design Process * Experience with Testbench Generation
Digital IC Design Engineer | Custom
Dallas, TX · On-site
$123K/yr
Drive RTL development and verification (RTL and Gate level) * Develop timing constraints and ... Design Engineer, including 3 years of design verification of mixed signal developments.
Digital IC Design Engineer | Custom
Dallas, TX · On-site
$123K/yr
Drive RTL development and verification (RTL and Gate level) * Develop timing constraints and ... Design Engineer, including 3 years of design verification of mixed signal developments.
Digital IC Design Engineer | Custom
Dallas, TX · On-site
$123K/yr
Drive RTL development and verification (RTL and Gate level) * Develop timing constraints and ... Design Engineer, including 3 years of design verification of mixed signal developments.
Digital IC Design Engineer | Custom
Dallas, TX · On-site
$123K/yr
Drive RTL development and verification (RTL and Gate level) * Develop timing constraints and ... Design Engineer, including 3 years of design verification of mixed signal developments.
Senior Physical Design Engineer (remote) at Chelsea Search Group Richardson, TX
Richardson, TX · On-site
$120 - $160/hr
Collaborate effectively with the full ASIC design implementation team with a Humble, Hungry and ... Skilled with Verilog/VHDL RTL and able to modify for timing or power closure * Production-proven ...
Senior Physical Design Engineer (remote) at Chelsea Search Group Richardson, TX
Richardson, TX · On-site
$120 - $160/hr
Collaborate effectively with the full ASIC design implementation team with a Humble, Hungry and ... Skilled with Verilog/VHDL RTL and able to modify for timing or power closure * Production-proven ...
The Principal Engineer will serve as the technical leader for the IO subsystem, driving architecture, RTL implementation, and design automation strategy, while partnering closely with system ...
The Principal Engineer will serve as the technical leader for the IO subsystem, driving architecture, RTL implementation, and design automation strategy, while partnering closely with system ...
The Principal Engineer will serve as the technical leader for the IO subsystem, driving architecture, RTL implementation, and design automation strategy, while partnering closely with system ...
The Principal Engineer will serve as the technical leader for the IO subsystem, driving architecture, RTL implementation, and design automation strategy, while partnering closely with system ...
... mentoring engineers, influencing design strategy, and ensuring worldclass design execution ... Champion design methodologies, develop reusable frameworks, and improve RTL design flows ...
... mentoring engineers, influencing design strategy, and ensuring worldclass design execution ... Champion design methodologies, develop reusable frameworks, and improve RTL design flows ...
Senior Staff Digital Design Engineer Plano, Texas, United States Sense the power of light ams OSRAM ... Translate customer and system requirements into optimized RTL architectures and high-quality ...
Senior Staff Digital Design Engineer Plano, Texas, United States Sense the power of light ams OSRAM ... Translate customer and system requirements into optimized RTL architectures and high-quality ...
Staff Wireless IC Digital Designer
Dallas, TX · On-site
$134K/yr
Staff Wireless Digital Design Engineer About the Role As a Senior Staff Wireless IC Digital ... Perform RTL design of block-level IP. * Perform RTL design and integration of RFIC architectures.
Staff Wireless IC Digital Designer
Dallas, TX · On-site
$134K/yr
Staff Wireless Digital Design Engineer About the Role As a Senior Staff Wireless IC Digital ... Perform RTL design of block-level IP. * Perform RTL design and integration of RFIC architectures.
Director, Custom HBM Design and Architecture
$199K - $379K/yr
Build, lead, and scale a high-performing RTL design and integration team, including recruiting, mentoring, and retention of top engineering talent. * Set technical direction and expectations ...
Director, Custom HBM Design and Architecture
$199K - $379K/yr
Build, lead, and scale a high-performing RTL design and integration team, including recruiting, mentoring, and retention of top engineering talent. * Set technical direction and expectations ...
New College Grad - Design Engineer, HBM DFT
$90K - $124K/yr
Collaborate with RTL, DV, PD, and Product/Test Engineering teams to resolve integration issues and ... ASIC/SoC design, DFT, or verification * Basic understanding of digital design fundamentals ...
New College Grad - Design Engineer, HBM DFT
$90K - $124K/yr
Collaborate with RTL, DV, PD, and Product/Test Engineering teams to resolve integration issues and ... ASIC/SoC design, DFT, or verification * Basic understanding of digital design fundamentals ...
New College Grad - Design Engineer, HBM DFT
Richardson, TX · On-site
$90K - $124K/yr
Collaborate with RTL, DV, PD, and Product/Test Engineering teams to resolve integration issues and ... ASIC/SoC design, DFT, or verification * Basic understanding of digital design fundamentals ...
New College Grad - Design Engineer, HBM DFT
Richardson, TX · On-site
$90K - $124K/yr
Collaborate with RTL, DV, PD, and Product/Test Engineering teams to resolve integration issues and ... ASIC/SoC design, DFT, or verification * Basic understanding of digital design fundamentals ...
Digital IC Design Engineer (INT TRX)
Dallas, TX · On-site
$123K/yr
About the Role We're looking for a talented Digital Design Engineer to join our team, where you'll ... Write and review RTL code , and drive designs through simulation, synthesis, and timing closure
Digital IC Design Engineer (INT TRX)
Dallas, TX · On-site
$123K/yr
About the Role We're looking for a talented Digital Design Engineer to join our team, where you'll ... Write and review RTL code , and drive designs through simulation, synthesis, and timing closure
About the Role We're looking for a talented Digital Design Engineer to join our team, where you'll ... Write and review RTL code , and drive designs through simulation, synthesis, and timing closure
About the Role We're looking for a talented Digital Design Engineer to join our team, where you'll ... Write and review RTL code , and drive designs through simulation, synthesis, and timing closure
HBM SOC Design Engineer
Richardson, TX · On-site
As an HBM SOC Design Engineer, you will be responsible for the design & development of next ... You will apply your deep understanding of SOC Architecture, RTL Logic Design, IP Integration, high ...
HBM SOC Design Engineer
Richardson, TX · On-site
As an HBM SOC Design Engineer, you will be responsible for the design & development of next ... You will apply your deep understanding of SOC Architecture, RTL Logic Design, IP Integration, high ...
As an HBM SOC Design Engineer, you will be responsible for the design & development of next ... You will apply your deep understanding of SOC Architecture, RTL Logic Design, IP Integration, high ...
As an HBM SOC Design Engineer, you will be responsible for the design & development of next ... You will apply your deep understanding of SOC Architecture, RTL Logic Design, IP Integration, high ...
HBM SoC Physical Design Engineer
Richardson, TX · On-site
$123K - $127K/yr
As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the ... You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and ...
HBM SoC Physical Design Engineer
Richardson, TX · On-site
$123K - $127K/yr
As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the ... You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and ...
HBM SoC Physical Design Engineer
Richardson, TX · On-site
$123K - $127K/yr
As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the ... You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and ...
HBM SoC Physical Design Engineer
Richardson, TX · On-site
$123K - $127K/yr
As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the ... You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and ...
Telecommute Asic Rtl Design Engineer information
See Dallas, TX salary details
$93K - $102.7K
16% of jobs
$102.7K - $112.4K
3% of jobs
$112.4K - $122.1K
4% of jobs
$125K is the 25th percentile. Wages below this are outliers.
$122.1K - $131.8K
6% of jobs
The median wage is $137.9K / yr.
$131.8K - $141.6K
33% of jobs
$141.6K - $151.3K
3% of jobs
$151.3K - $161K
2% of jobs
$167.4K is the 75th percentile. Wages above this are outliers.
$161K - $170.7K
12% of jobs
$170.7K - $180.4K
5% of jobs
$180.4K - $190.1K
4% of jobs
$190.1K - $199.8K
12% of jobs
$93K
$148.6K
$199.8K
How much do telecommute asic rtl design engineer jobs pay per year?
What are some common challenges faced by telecommute ASIC RTL design engineers, and how can they be addressed?
What are the key skills and qualifications needed to thrive as a telecommute ASIC RTL design engineer?
What is a telecommute ASIC RTL design engineer?
What is the difference between Telecommute Asic Rtl Design Engineer vs Telecommute Digital IC Design Engineer?
| Aspect | Telecommute Asic Rtl Design Engineer | Telecommute Digital IC Design Engineer |
|---|---|---|
| Credentials | Bachelor's or Master's in Electrical Engineering or Computer Engineering; experience with RTL coding | Bachelor's or Master's in Electrical Engineering or Computer Engineering; experience with digital circuit design |
| Work Environment | Remote, primarily designing RTL code for ASICs | Remote, focusing on digital IC architecture and design |
| Industry Usage | Common in semiconductor and electronics companies |
Both roles often require similar educational backgrounds and work remotely in the semiconductor industry. The main difference lies in their focus: RTL Design Engineers concentrate on writing RTL code for ASICs, while Digital IC Design Engineers work on broader digital circuit architecture. Candidates should choose based on their specific skills and career interests in digital design or RTL coding.
Full-time
Medical, Dental, Vision, PTO
Re-posted 10 days ago
Micron Technology rating
8.6
Based on 43 frontline employees who took The Breakroom Quiz
27th of 156 rated electronics manufacturers
Job description
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
As a Staff DFT Design Engineer, you will work on design, simulation, and validation of next generation High Bandwidth Memory (HBM) architectures and circuit blocks. The HBM DFT Design Engineer is responsible for defining, designing, and integrating Design for Test (DFT) architectures for next generation High Bandwidth Memory (HBM) products. This role ensures robust test coverage across wafer, die, stack, and system in package (SiP) test stages while balancing performance, power, area, and manufacturing cost. The engineer works in a multi-functional manner with HBM build, verification, product engineering, test enablement, packaging, and external partners to deliver manufacturable, high quality HBM solutions.
Responsibilities will include, but are not limited to:
Define and implement HBM DFT architectures, including scan, MBIST, JTAG, boundary scan, TSV test, redundancy test, and atspeed test structures.
Develop DFT solutions for both base die and DRAM die, considering stackeddie and cubelevel test requirements.
Design and integrate test access mechanisms to support wafer probe, cube test, and SiP/system test flows.
Collaborate with Product Engineering and Test Enablement teams to align DFT features with manufacturing test flows and cost targets.
Support yield learning, failure analysis, and debug by enabling observability and controllability in silicon.
Work closely with logic, analog, layout, verification, and physical design teams to ensure DFT is correctly implemented and verified.
Collaborate with external partners and customers to align on custom DFT interfaces and security requirements when applicable.
Support silicon bringup, debug, and qualification activities, including correlation between design intent and manufacturing test results.
Minimum Qualifications:
Bachelor's degree or Master's degree or equivalent experience in Electrical Engineering, Computer Engineering, or related field.
Strong fundamentals in digital design and DFT concepts (scan, MBIST, boundary scan, JTAG).
Experience with RTL design (SystemVerilog/VHDL) and logic integration.
Familiarity with semiconductor test flows from wafer probe through final test.
5+ years DRAM or ASIC DFT Design or Verification experience.
Preferred Qualifications:
Experience with HBM, DRAM, or advanced memory products.
Knowledge of TSVbased 3D integration and stackeddie test challenges.
Handson experience with atspeed test, compression, or advanced DFT methodologies.
Exposure to DFT security, customerspecific DFT interfaces, or custom test modes.
Structured problemsolving and debug perspective.
As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.
Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.
To learn about your right to work click here.
To learn more about Micron, please visit micron.com/careers
For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron's People Organization at hrsupport_na@micron.com or 1-800-336-8918 (select option #3)
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.
Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.
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Benefits
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About Micron Technology
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Industry
Semiconductor and electronic component manufacturing
Company size
10,000+ Employees
Headquarters location
Boise, ID, US
Year founded
2019