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Telecommute Asic Rtl Design Engineer Jobs in Austin, TX

Nvidia

ASIC Design Engineer - Hardware

Austin, TX · Hybrid

Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You ... Run and debug RTL checks to ensure design quality (e.g., cross clock domains (CDC), clocks, reset ...

Intel Corporation

CPU RTL Design Engineer

Austin, TX · On-site

$141K - $269K/yr

As a CPU Logic Design Engineer, you will play a critical role in designing and optimizing the logic for Intel's cutting-edge processors. You will drive the development of register transfer level (RTL ...

Intel

CPU RTL Design Engineer

Austin, TX

$141K - $269K/yr

As a CPU Logic Design Engineer, you will play a critical role in designing and optimizing the logic for Intel's cutting-edge processors. You will drive the development of register transfer level (RTL ...

Meta

ASIC Engineer, Physical Design

Austin, TX

$178K/yr

ASIC Engineer, Physical Design Responsibilities: * Lead physical implementation of complex ASIC ... Collaborate with RTL design and architecture teams to provide physical design feedback on ...

Qualcomm

GPU Design Engineer

Austin, TX · On-site

Provide hands-on technical leadership across RTL design and design verification, including ... Extensive experience delivering complex GPU, CPU, and/or ASIC designs from micro-architecture ...

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All JobsTelecommute Asic Rtl Design Engineer JobsTelecommute Asic Rtl Design Engineer Jobs in Austin, TX

Telecommute Asic Rtl Design Engineer information

See Austin, TX salary details

$93.2K

$148.9K

$200.2K

How much do telecommute asic rtl design engineer jobs pay per year?

As of Jul 16, 2026, the average yearly pay for telecommute asic rtl design engineer in Austin, TX is $148,875.00, according to ZipRecruiter salary data. Most workers in this role earn between $130,300.00 and $178,400.00 per year, depending on experience, location, and employer.

What are some common challenges faced by telecommute ASIC RTL Design Engineers, and how can they be addressed?

Telecommute ASIC RTL Design Engineers often face challenges like coordinating effectively with remote teams, ensuring version control integrity, and maintaining clear communication on project specifications. These challenges can be mitigated by utilizing robust collaboration tools, adhering to standardized documentation practices, and scheduling regular virtual meetings for design reviews. Additionally, staying proactive in seeking feedback and clarifying requirements helps ensure alignment and prevents costly design iterations.

What are the key skills and qualifications needed to thrive as a Telecommute ASIC RTL Design Engineer, and why are they important?

To thrive as a Telecommute ASIC RTL Design Engineer, you need a strong background in digital logic design, proficiency in hardware description languages like Verilog or VHDL, and typically a degree in electrical or computer engineering. Familiarity with EDA tools such as Synopsys or Cadence, as well as experience with simulation, synthesis, and debugging environments, is essential. Strong problem-solving abilities, attention to detail, and effective communication skills are crucial for collaborating remotely and ensuring design accuracy. These skills are vital to deliver complex, high-performance ASICs on schedule while working efficiently in a remote setting.

What is a Telecommute ASIC RTL Design Engineer?

A Telecommute ASIC RTL Design Engineer is a professional who specializes in designing digital circuits at the Register Transfer Level (RTL) for Application-Specific Integrated Circuits (ASICs), while working remotely. They use hardware description languages like Verilog or VHDL to create and verify circuit designs tailored to specific applications. Their responsibilities often include developing, simulating, and optimizing digital logic, collaborating with cross-functional teams, and ensuring that the final silicon meets design specifications. Since the role is telecommute, all work is performed from a remote location using digital communication and collaboration tools.

What is the difference between Telecommute Asic Rtl Design Engineer vs Telecommute Digital IC Design Engineer?

AspectTelecommute Asic Rtl Design EngineerTelecommute Digital IC Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with RTL codingBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with digital circuit design
Work EnvironmentRemote, primarily designing RTL code for ASICsRemote, focusing on digital IC architecture and design
Industry UsageCommon in semiconductor and electronics companies

Both roles often require similar educational backgrounds and work remotely in the semiconductor industry. The main difference lies in their focus: RTL Design Engineers concentrate on writing RTL code for ASICs, while Digital IC Design Engineers work on broader digital circuit architecture. Candidates should choose based on their specific skills and career interests in digital design or RTL coding.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Austin, TX? The most popular types of Asic Rtl Design Engineer jobs in Austin, TX are:
What cities near Austin, TX are hiring for Telecommute Asic Rtl Design Engineer jobs? Cities near Austin, TX with the most Telecommute Asic Rtl Design Engineer job openings:
Telecommute Asic Rtl Design Engineer jobs near you
Sr. RTL Design Engineer (Silicon Engineering)

Sr. RTL Design Engineer (Silicon Engineering)

SpaceX

Austin, TX • On-site

Full-time

Posted 3 days ago

SpaceX rating

8.8

Company rating: 8.8 out of 10

Based on 146 frontline employees who took The Breakroom Quiz

7th of 61 rated aerospace companies

Job description

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
SR. RTL DESIGN ENGINEER (SILICON ENGINEERING)
At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe.
We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.
RESPONSIBILITIES:
  • Evaluate architectural trade-offs based on features, performance requirements and system limitations
  • Define micro-architecture, implement the RTL in Verilog/System Verilog, integrate that in top level and deliver the fully verified, synthesis/timing clean design
  • Work closely with verification team to ensure all aspects of the design are covered and verified
  • Provide timing constraint for those IPs and support the physical implementation team (synthesis, timing closure, formality check)
  • Participate in silicon bring-up and validation

BASIC QUALIFICATIONS:
  • Bachelor's degree in electrical engineering, computer engineering, or computer science
  • 5+ years of experience in RTL implementation

PREFERRED SKILLS AND EXPERIENCE:
  • Ability to solve complex problems including clock domain crossings and power optimization
  • ASIC/SoC system integration experience
  • Experience with embedded CPU subsystems
  • Experience with standard bus protocols (e.g. AXI, AHB, etc.)
  • Experience with high speed and low power design techniques
  • Scripting skills (e.g. Python, etc.)
  • Experience with EDA tools such as HDL simulators and HDL Lint tools
  • Team-player, can-do attitude and ability to work well in a group environment while still contributing on an individual basis
  • Enjoys being challenged and learning new skills

ADDITIONAL REQUIREMENTS:
  • Ability to work extended hours or weekends as needed for mission critical deadlines

ITAR REQUIREMENTS:
  • To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX's Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com.

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