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Telecommute Asic Rtl Design Engineer Jobs in New Jersey

EndoSec LLC

FPGA Engineer

Moorestown, NJ · On-site

$128K - $164K/yr

Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...

Altera

$134K - $195K/yr

What You Will Do As a Field Applications Engineer (FAE) , your key responsibilities will be ... Experience in FPGA, ASIC, and/or digital design * Experience with FPGA development tools (e.g ...

langan

Civil Engineer

Parsippany, NJ · On-site

$100K - $110K/yr

Partial telecommuting is permitted up to 3 days per week. Job title: Civil Engineer (REF# MB0526 ... Prepares the planning, design and permitting documents of civil engineering, land development and ...

langan

Civil Engineer

Parsippany, NJ · Hybrid

$100K - $110K/yr

Partial telecommuting is permitted up to 3 days per week. Job title: Civil Engineer (REF# MB0526 ... Prepares the planning, design and permitting documents of civil engineering, land development and ...

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Telecommute Asic Rtl Design Engineer information

What are some common challenges faced by telecommute ASIC RTL design engineers, and how can they be addressed?

Telecommute ASIC RTL Design Engineers often face challenges like coordinating effectively with remote teams, ensuring version control integrity, and maintaining clear communication on project specifications. These challenges can be mitigated by utilizing robust collaboration tools, adhering to standardized documentation practices, and scheduling regular virtual meetings for design reviews. Additionally, staying proactive in seeking feedback and clarifying requirements helps ensure alignment and prevents costly design iterations.

What are the key skills and qualifications needed to thrive as a telecommute ASIC RTL design engineer?

To thrive as a Telecommute ASIC RTL Design Engineer, you need a strong background in digital logic design, proficiency in hardware description languages like Verilog or VHDL, and typically a degree in electrical or computer engineering. Familiarity with EDA tools such as Synopsys or Cadence, as well as experience with simulation, synthesis, and debugging environments, is essential. Strong problem-solving abilities, attention to detail, and effective communication skills are crucial for collaborating remotely and ensuring design accuracy. These skills are vital to deliver complex, high-performance ASICs on schedule while working efficiently in a remote setting.

What is a telecommute ASIC RTL design engineer?

A Telecommute ASIC RTL Design Engineer is a professional who specializes in designing digital circuits at the Register Transfer Level (RTL) for Application-Specific Integrated Circuits (ASICs), while working remotely. They use hardware description languages like Verilog or VHDL to create and verify circuit designs tailored to specific applications. Their responsibilities often include developing, simulating, and optimizing digital logic, collaborating with cross-functional teams, and ensuring that the final silicon meets design specifications. Since the role is telecommute, all work is performed from a remote location using digital communication and collaboration tools.

What is the difference between Telecommute Asic Rtl Design Engineer vs Telecommute Digital IC Design Engineer?

AspectTelecommute Asic Rtl Design EngineerTelecommute Digital IC Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with RTL codingBachelor's or Master's in Electrical Engineering or Computer Engineering; experience with digital circuit design
Work EnvironmentRemote, primarily designing RTL code for ASICsRemote, focusing on digital IC architecture and design
Industry UsageCommon in semiconductor and electronics companies

Both roles often require similar educational backgrounds and work remotely in the semiconductor industry. The main difference lies in their focus: RTL Design Engineers concentrate on writing RTL code for ASICs, while Digital IC Design Engineers work on broader digital circuit architecture. Candidates should choose based on their specific skills and career interests in digital design or RTL coding.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in New Jersey? The most popular types of Asic Rtl Design Engineer jobs in New Jersey are:
What cities in New Jersey are hiring for Telecommute Asic Rtl Design Engineer jobs? Cities in New Jersey with the most Telecommute Asic Rtl Design Engineer job openings:
Telecommute Asic Rtl Design Engineer jobs near you

Failure Analysis Engineering Manager, GPU ASIC and PCBA Debug

Advanced Micro Devices, Inc

Secaucus, NJ • On-site

$128K/yr

Full-time

Re-posted 9 days ago

Advanced Micro Devices rating

8.6

Company rating: 8.6 out of 10

Based on 13 frontline employees who took The Breakroom Quiz

27th of 157 rated electronics manufacturers

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
The Quality Engineering team is looking for an experienced GPU ASIC and PCBA Debug and Failure Analysis Engineering Manager to lead and develop a team of FA engineers. This role is intended for a proven people manager with prior experience building, mentoring, and guiding high-performing engineering teams, while also serving as a strong technical lead in GPU ASIC and board-level (PCBA) failure analysis. The individual will oversee customer and factory failure investigations for GPU accelerators, help drive failure reproduction and isolation, and work closely with cross-functional teams including design, validation, FW, and manufacturing to accelerate root cause analysis and corrective actions. Your contributions will directly impact team effectiveness, product quality, reliability, and customer satisfaction.
THE PERSON:
The ideal candidate is a strong people leader and technical expert who leads by example and is passionate about building, teaching, and mentoring a growing team of high-performing FA engineers. They bring prior experience managing, hiring, and developing engineers, creating an environment of accountability, collaboration, and continuous learning, while remaining hands-on enough to guide complex debug and failure analysis efforts in a fast-paced time to market environment. This person is a clear communicator, and a trusted technical leader who can elevate team capability, help others grow in their careers, and drive strong execution in a fast-paced environment. They combine deep analytical problem-solving skills with a practical, hands-on approach, and continuously look for ways to improve team effectiveness, technical depth, and overall quality outcomes.
KEY RESPONSIBILITIES:
  • Provide technical leadership for triage and debug of complex GPU and PCBA failures across power, ASIC, firmware, and thermals, guiding the FA team to root cause.
  • Lead failure reproduction and triage by defining debug plans, directing investigations, and guiding experiments and escalation paths for complex issues.
  • Drive debug automation, diagnostic tools, and data analysis methods that improve triage efficiency and consistency across failure domains.
  • Lead cross-functional triage with manufacturing partners and AMD teams to align on failure hypotheses, reproduction, and root cause.
  • Guide board-level debug using schematics, layouts, and design documentation to direct analysis and mentor engineers through the process.
  • Ensure clear documentation of failure analysis results, root cause findings, and corrective actions for customer and internal use.
  • Present technical findings, triage updates, risks, and recovery plans to stakeholders and senior leadership.
  • Drive continuous improvement of FA methods, triage processes, and best practices across power, ASIC, firmware, and thermal debug.
  • Manage and develop a team of FA engineers by setting priorities, providing technical guidance, and coaching through complex investigations.

PREFERRED EXPERIENCE:
  • Experience leading and developing engineering teams, with a strong track record of hiring, coaching, mentoring, and growing FA engineers.
  • Deep expertise in GPU ASIC debug, validation, and functional or stress test development.
  • Strong background in PCBA diagnostics, failure analysis, and board-level debug from NPI through production.
  • Experience leading triage across power, ASIC, firmware, and thermal failure domains.
  • Strong hands-on lab experience with oscilloscopes, logic analyzers, and custom debug tools.
  • Solid understanding of firmware, drivers, and hardware interactions in complex system debug.
  • Extensive experience in hardware verification, system integration, and failure reproduction.
  • Proficient in Python, shell scripting, and working across Windows and Linux environments.
  • Strong leadership, communication, and presentation skills, with the ability to teach, mentor, and lead by example.
  • Able to read schematics, interpret datasheets, identify components, and support board-level debug and rework.
  • Knowledge of high-speed digital design, HBM or GDDR memory, PCIe, and GPU data center systems is a plus.

ACADEMIC CREDENTIALS:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.

LOCATION:
  • Secaucus, NJ

This role is not eligible for visa sponsorship.
#LI-LB1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.
This posting is for an existing vacancy.

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