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Job Details:Job Description: 

As a Principal Engineer for Die-to-Wafer Hybrid Bonding (HBI) module, you will play a pivotal role in defining and scaling next-generation advanced packaging technologies that enable Intel's leadership in high-performance computing, AI, and chiplet architectures.
This role operates at the intersection of pathfinding, technology development, and manufacturing, with responsibility for driving hybrid bonding capability from first-of-a-kind (FOK) platform development through qualification, ramp, and high-volume manufacturing (HVM). You will bring deep industry expertise in hybrid bonding equipment and process development, yield and reliability improvement, and platform innovation, helping Intel deliver robust, scalable solutions across multiple products and sites.
Your work will directly impact Intel's ability to execute advanced packaging roadmaps by delivering state-of-the-art hybrid bonding solutions with industry-leading performance, reliability, and cost efficiency, while shaping both internal strategy and the external ecosystem.
Key Responsibilities

• Define and drive the hybrid bonding technology roadmap, including pitch scaling, alignment/overlay requirements, and yield, defectivity, and reliability targets aligned to future product needs.
• Lead module-level process development and execution for die-to-wafer hybrid bonding, ensuring robust, manufacturable solutions integrated across adjacent process steps (die prep, thinning, planarization).
• Drive first-of-a-kind (FOK) equipment and platform development, from concept through implementation, enabling next-generation bonding architectures and capabilities.
• Develop and implement strategies to address critical hybrid bonding challenges, including:
  • Bond interface defects (voids, adhesion failures)
  • Alignment and overlay limitations
  • Surface preparation and materials interactions
  • Defectivity reduction and contamination control
• Lead resolution of systemic yield and reliability issues, applying data-driven and model-based methodologies to drive step-function improvements in process capability and manufacturability.
• Partner with equipment vendors and materials suppliers to develop enabling technologies and influence next-generation bonding tools aligned with Intel's roadmap.
• Collaborate across technology development, process integration, and manufacturing teams to ensure consistent execution between TD and HVM environments.
• Identify future technology needs, stay at the forefront of industry trends, and drive cross-organizational and external collaboration to develop scalable, cost-effective solutions.
• Mentor and develop technical leaders and domain experts, fostering a culture of innovation, technical excellence, and continuous capability growth.
• Align technical strategies with organizational goals and demonstrate strong ownership and execution to successfully deliver new technologies into production.

Required Skills and Experience

• Deep expertise in hybrid bonding, wafer bonding, or advanced packaging module development.
• Proven industry experience in:
  • Hybrid bonding equipment development and process development
  • Process optimization, yield improvement, and reliability enhancement
  • First-of-a-kind (FOK) platform or equipment development and scaling to high-volume manufacturing (HVM)
• Ability to translate technology roadmaps into executable module strategies
• Experience identifying process and equipment limitations and delivering robust, scalable solutions
• Experience operating across technology development and manufacturing environments, with exposure to process qualification, ramp, or transfer to production.
• Experience mentoring and developing senior technical talent, building sustained technical capability within the organization
• Excellent communication and decision-making skills, with the ability to align technical vision with organizational and product goals

Preferred Skills and Experience

• Track record of delivering first-of-a-kind hybrid bonding platforms into HVM and driving step-function improvements in yield, reliability, and manufacturability
• Experience working with advanced packaging flows (chiplets, 2.5D/3D integration) and with equipment-process co-optimization and supplier engagement
• Knowledge in any of the following areas
  • Bond interface physics (Cu-Cu, dielectric bonding) and defect mechanisms
  • Defect reduction, contamination control, and material interaction challenges
  • Alignment/overlay critical processes and precision manufacturing requirements

Qualifications:

• Degree in Materials Science, Electrical Engineering, Chemical Engineering, Physics, or a related field.
• Bachelor's degree + 15+ years of experience, or Master's degree + 10+ years of experience, or PhD + 8+ years of experience

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:Business group:Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $211,400.00-298,440.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.