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System Chip Performance Architect Jobs (NOW HIRING)

Microsoft

Senior Performance Architect

Hillsboro, OR · On-site

$181K/yr

Work closely with the product architecture System On Chip (SOC) architecture teams, IP architecture, to ensure our SOC and IPs enable performant, efficient, and industry-leading systems.

Apple

Systems Performance Architect

Cupertino, CA · On-site

$206K/yr

The System Performance Architecture team is responsible for all aspects of performance spanning hardware (CPU, GPU, DRAM, storage), software (OS, drivers, applications), and other system ...

Qualcomm

Senior SoC Performance Architect

Santa Clara, CA · On-site +1

$196K/yr

We are seeking a Senior SoC Performance Architect to lead server CPU workload analysis, performance ... on-chip fabric/interconnect, memory controllers, DRAM systems, coherency, and I/O subsystems.

Apple

Systems Performance Architect

Cupertino, CA

$150K - $277K/yr

The System Performance Architecture team is responsible for all aspects of performance spanning hardware (CPU, GPU, DRAM, storage), software (OS, drivers, applications), and other system ...

Tenstorrent

Performance Architect, AI HW

Santa Clara, CA · On-site +1

$100K - $500K/yr

Advanced modeling techniques for large-scale AI systems, including multi-chip and distributed performance analysis. * How architectural choices propagate through the software stack-from compiler and ...

Apple Inc.

Systems Performance Architect

Cupertino, CA · On-site

$150K - $277K/yr

The System Performance Architecture team is responsible for all aspects of performance spanning hardware (CPU, GPU, DRAM, storage), software (OS, drivers, applications), and other system ...

Qualcomm

Senior AI Performance Architect

Raleigh, NC · On-site

$162K/yr

We are looking for AI Accelerator Architecture Engineers to drive functional, performance and power ... Knowledge of Network-on-Chip (NoC) designs used in System-on-Chip (SoC) designs * Understanding of ...

SiFive

Core Performance Architect

Austin, TX · On-site

$178K - $218K/yr

... of chip design, including artificial intelligence, machine learning, automotive, data center ... As an E-Verify employer, we use this system to confirm the employment eligibility of all new hires ...

SiFive

Core Performance Architect

Santa Clara, CA · On-site

$158K - $194K/yr

... of chip design, including artificial intelligence, machine learning, automotive, data center ... As an E-Verify employer, we use this system to confirm the employment eligibility of all new hires ...

SiFive

Core Performance Architect

Santa Clara, CA · On-site

$178K - $218K/yr

... of chip design, including artificial intelligence, machine learning, automotive, data center ... As an E-Verify employer, we use this system to confirm the employment eligibility of all new hires ...

SiFive, Inc.

Core Performance Architect

Santa Clara, CA · On-site

$254K - $310K/yr

... of chip design, including artificial intelligence, machine learning, automotive, data center ... As an E‑Verify employer, we use the system to confirm the employment eligibility of all new hires ...

SiFive

Core Performance Architect

Austin, TX · On-site

$158K - $194K/yr

... of chip design, including artificial intelligence, machine learning, automotive, data center ... As an E-Verify employer, we use this system to confirm the employment eligibility of all new hires ...

SiFive

Core Performance Architect

Santa Clara, CA · On-site

$158K - $194K/yr

... of chip design, including artificial intelligence, machine learning, automotive, data center ... As an E-Verify employer, we use this system to confirm the employment eligibility of all new hires ...

SiFive

Core Performance Architect

Berkeley, CA · On-site

$158K - $194K/yr

... of chip design, including artificial intelligence, machine learning, automotive, data center ... As an E-Verify employer, we use this system to confirm the employment eligibility of all new hires ...

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System Chip Performance Architect information

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$156.5K

$168K

How much do system chip performance architect jobs pay per year?

As of Sep 10, 2026, the average yearly pay for system chip performance architect in the United States is $167,842.00, according to ZipRecruiter salary data. Most workers in this role earn between $167,000.00 and $167,000.00 per year, depending on experience, location, and employer.

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For System Chip Performance Architect jobs, the most frequently searched job titles are:

Senior Performance Architect

Hillsboro, OR • On-site

Microsoft
Computer and Computer Peripheral Equipment and Software Wholesalers • 10K+ employees
Learn more about Microsoftexternal

$181K/yr

Full-time

Re-posted 6 days ago

Microsoft rating

8.6

Company rating: 8.6 out of 10

Based on 134 frontline employees who took The Breakroom Quiz

71st of 247 rated software companies

Job description

Overview
Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission.
As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Compute Silicon and Manufacturing Organization (CSME) team is instrumental in defining and delivering operational measures of success for the Cobalt program through hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. CSME is at the forefront of innovation and application of AI to silicon development workflows. We are looking for senior engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.
We are looking for a Senior Performance Architect to join the team.
Responsibilities
  • Develop performance modeling methodologies by creating and owning System on Chip (SOC) / Intellectual Property (IP) cycle-accurate/approximate performance models and analysis tools in C++ and Python.
  • Use workload information and working with Micro-architects and Register Transfer Level (RTL) team to identify performance bottlenecks. Collaborate across functionally to propose architectural/microarchitectural changes and provide the required quantitative justification.
  • Leverage AI tools and infrastructure for comprehensive performance modeling, including coding, performance tuning, and analysis.
  • Verify the correlation of the SOC performance models to the RTL implementation.
  • Work closely with the product architecture System On Chip (SOC) architecture teams, IP architecture, to ensure our SOC and IPs enable performant, efficient, and industry-leading systems.
  • Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion

Qualifications
Required/Minimum Qualifications
  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.

Other Qualifications:
  • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
  • This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

Additional or Preferred Qualifications
  • 3+ years of experience developing SOC or IP performance models and benchmarks from conception to microarchitecture specification.
  • Deep understanding of computer architecture, System on Chip (SOC) and system-software architectures, and their performance tradeoffs.
  • Significant understanding of input/output (I/O), memory subsystems, coherency flows, interconnect, Quality of Service (QoS) traffic.
  • Knowledge of performance monitors and post-silicon SOC and performance tuning is a plus.
  • Excellent communication, collaboration and teamwork skills and ability to contribute to diverse and inclusive teams.

Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
https://careers.microsoft.com/us/en/us-corporate-pay
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

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About Microsoft

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Our infrastructure is comprised of a large global portfolio of more than 100 datacenters and 1 million servers. Our foundation is built upon and managed by a team of subject matter experts working to support services for more than 1 billion customers and 20 million businesses in over 90 countries worldwide. With environmental sustainability and optimization at the forefront of our datacenter design and operations, we continue to grow and evolve as we meet the ever-changing business demands that hold Microsoft as a world-class cloud provider.

Industry

Computer and computer peripheral equipment and software wholesalers

Company size

10,000+ Employees

Headquarters location

Redmond, WA, US

Year founded

1975

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