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Sta Static Timing Analysis Engineer Jobs in Virginia

Senior FPGA Engineer

Herndon, VA ยท On-site

$133K - $171K/yr

FPGA design experience with physical synthesis, static timing analysis, formal verification, power ... Comfort working closely with HW/RF engineering specialties on design and configuration for RF ...

Senior FPGA Engineer

Herndon, VA

$133K - $171K/yr

FPGA design experience with physical synthesis, static timing analysis, formal verification, power ... Comfort working closely with HW/RF engineering specialties on design and configuration for RF ...

Senior FPGA Engineer

Herndon, VA ยท On-site +1

$133K - $171K/yr

FPGA design experience with physical synthesis, static timing analysis, formal verification, power ... Comfort working closely with HW/RF engineering specialties on design and configuration for RF ...

Eng Sr Prin - Elec

Manassas, VA ยท On-site

$132K - $226K/yr

Bachelors degree in Electrical or Computer Engineering * 8+ years industry experience in ASIC development * ASIC implementation experience to include: * Physical Design * Static Timing Analysis

FPGA System Architect

Charlottesville, VA ยท On-site

$129K - $165K/yr

The engineer will lead the technical execution, integration, and deployment of a digital signal ... timing analysis, and system integration, as required * Lead subsystem design reviews and contribute ...

FPGA System Architect

Charlottesville, VA

$129K - $165K/yr

The engineer will lead the technical execution, integration, and deployment of a digital signal ... timing analysis, and system integration, as required * Lead subsystem design reviews and contribute ...

Embedded FPGA Engineer

Mclean, VA

$131K - $168K/yr

Embedded FPGA Engineer The Opportunity: We are seeking a motivated FPGA, and software engineer to ... timing analysis, implementation, and debug * Experience with Xilinx, Vitis, Vivado or FPGA ...

Embedded FPGA Engineer

Mclean, VA ยท On-site

$131K - $168K/yr

Embedded FPGA Engineer The Opportunity: We are seeking a motivated FPGA, and software engineer to ... timing analysis, implementation, and debug * Experience with Xilinx, Vitis, Vivado or FPGA ...

Sr. FPGA Engineer II

Chantilly, VA

$133K - $171K/yr

Perform synthesis, implementation, and timing analysis. YOU'LL BRING THESE QUALIFICATIONS AS FIRMWARE ENGINEER II: * Bachelor's degree in computer engineering or electrical engineering or equivalent ...

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Sta Static Timing Analysis Engineer information

What are STA (Static Timing Analysis) Engineers?

STA (Static Timing Analysis) Engineers are specialists in the semiconductor industry who analyze and verify the timing performance of digital circuits without requiring dynamic simulation. They use specialized software tools to ensure that signal transitions occur within required time constraints, preventing issues like data corruption or circuit malfunction. Their work is crucial in the design and validation stages of integrated circuits (ICs), helping to guarantee that chips will function reliably at specified speeds and under different conditions.

What are some common challenges faced by STA Static Timing Analysis Engineers during project cycles?

STA Static Timing Analysis Engineers often encounter challenges related to tight project deadlines and complex design specifications. Balancing multiple design corners, managing timing closure for increasingly smaller technology nodes, and coordinating with physical design, synthesis, and verification teams are key hurdles. Additionally, staying updated with evolving EDA tools and methodologies is essential to ensure accurate analysis. Effective communication and troubleshooting skills are critical to resolve timing violations and deliver high-quality silicon on schedule.

What are the key skills and qualifications needed to thrive as a Static Timing Analysis (STA) Engineer, and why are they important?

To thrive as a Static Timing Analysis Engineer, you need a solid background in digital circuit design, timing concepts, and typically a degree in electrical or computer engineering. Proficiency with EDA tools such as Synopsys PrimeTime, Cadence Tempus, and scripting languages like TCL or Perl is essential. Strong problem-solving abilities, attention to detail, and effective communication skills set top performers apart in this role. These competencies ensure accurate timing verification, efficient collaboration, and successful delivery of complex semiconductor projects.
What are popular job titles related to Sta Static Timing Analysis Engineer jobs in Virginia? For Sta Static Timing Analysis Engineer jobs in Virginia, the most frequently searched job titles are:
What cities in Virginia are hiring for Sta Static Timing Analysis Engineer jobs? Cities in Virginia with the most Sta Static Timing Analysis Engineer job openings:
FPGA/ASIC Design Engineer with Security Clearance

FPGA/ASIC Design Engineer with Security Clearance

Indotronix International Corp

Herndon, VA โ€ข On-site

$115/hr

Contractor

Posted 12 days ago


Job description

Job Title: FPGA/ASIC Design Engineer
Location: Herndon, VA
Duration: 12 Months
Pay: $115/hr on W2
Active Secret Clearance Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key design team, responsible for the delivery of FPGAs for defense applications. S/he will architect, implement FPGA design, with hands on design/debug with primarily Ethernet, I2C, SPI, AXI protocols. L3Harris has state-of-the-art EDA flows/methodologies including Mentor EDA: Simulator Questa Prime, Verification IP (QVIPs), UVM framework, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), Questa Lint, Synopsys (DC/Primetime/Synplify), Xilinx/Intel/Microchip EDA (Vivado/Libero/Quartus). We are a learning organization and have the capability to target all FPGA vendors and have ASIC front end capability, with mature design processes. This is a high impact role in the organization to ensure robust quality and delivery of communication products for National Security. Essential Functions: Derive FPGA design specifications from system requirements
Develop detailed FPGA architecture for implementation
Implement design in RTL (VHDL) and perform module level simulations
Perform Synthesis, Place and Route (PAR) and Static Timing Analysis (STA)
Perform RTL quality using: Lint, Reset Domain Crossing (RDC), Clock Domain Crossing (CDC) , Static Formal EDA
Generate verification test plans and perform End to End Simulations
Support Board, FPGA bring up
Validate design through HW/SW integration test with test equipment
Support product collateral for NSA certification Qualifications: Bachelor of Science (BS) -Four year degree or Masters (MS) or PhD from an accredited course of study in engineering, engineering technology (chemistry, physics, mathematics, data science, or Electrical/Electronics/Computer Engineering/Computer Science)
3-5+ yearsโ€™ experience designing FPGA products with VHDL
Experience with Xilinx FPGAs and Vivado
Experience with Revision control system
Experience with Earned Value Management (EVM)
Good written, verbal, and presentation skills
Active DoD Security Clearance Preferred Additional Skills: Experience with mapping algorithms to architecture
Experience in C++ (OOP)
Experience with any of protocols : Ethernet, TCP/IP, PCIe, NVMe, USB
Experience with Xilinx SoC design with SDKs and PetaLinux OS
Experience with High-Level Synthesis (HLS) with Vivado HLX or Mentor Catapult

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About Indotronix

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In 1986, Indotronix established itself in the staffing space. 22 years later, Avani entered the scene, offering consulting and technology development. Finally, in 2016, the two joined forces to begin delivering talent across all areas, from Staffing to Consulting to unique platform development.

Industry

Recruiting and staffing services

Company size

1,001 - 5,000 Employees

Headquarters location

Rochester, NY, US