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Software Integrity Engineer Jobs in California (NOW HIRING)

Etched

Power Integrity Engineer

San Jose, CA · On-site

$2.0K/mo

We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and ... Job Summary We are looking for a Power Integrity (PI) Engineer to join our platform electrical ...

Mosaic.tech

Staff Software Engineer

Mountain View, CA · On-site

$150K - $226K/yr

It provides end‑to‑end visibility, policy enforcement, and real‑time risk detection to help engineering teams ensure software integrity, prevent tampering, and comply with evolving supply chain ...

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All JobsSoftware Integrity Engineer JobsSoftware Integrity Engineer Jobs in California

Software Integrity Engineer information

See California salary details

$62.7K

$145.6K

$202.8K

How much do software integrity engineer jobs pay per year?

As of Sep 13, 2026, the average yearly pay for software integrity engineer in California is $145,592.00, according to ZipRecruiter salary data. Most workers in this role earn between $118,400.00 and $170,700.00 per year, depending on experience, location, and employer.

What is a software integrity engineer?

Software Integrity Engineers are professionals responsible for ensuring the security, quality, and compliance of software systems throughout the development lifecycle. They focus on identifying vulnerabilities, enforcing coding standards, and integrating tools that detect issues such as bugs, security flaws, and license violations. Their work helps organizations deliver reliable and trustworthy software by implementing best practices and automated checks. This role often involves collaboration with developers, quality assurance teams, and IT security specialists.

What are some common challenges faced by software integrity engineers in ensuring code quality and security across multiple development teams?

Software Integrity Engineers often work with diverse development teams, which can lead to challenges such as aligning teams on secure coding standards, managing code reviews at scale, and integrating automated testing tools into various workflows. Balancing rapid software delivery with thorough security checks requires effective communication and robust processes. Additionally, staying updated with evolving security threats and ensuring consistent compliance across projects are ongoing tasks that demand adaptability and proactive problem-solving.

What are the key skills and qualifications needed to thrive as a software integrity engineer, and why are they important?

To thrive as a Software Integrity Engineer, you need expertise in software development, secure coding practices, and vulnerability assessment, often supported by a degree in computer science or a related field. Familiarity with tools like static and dynamic code analysis software, CI/CD systems, and security certifications such as CISSP or CEH is common. Strong analytical thinking, attention to detail, and effective communication help you identify risks and collaborate with development teams. These skills are vital to ensure the reliability, security, and compliance of software products in today's digital landscape.

What is the difference between Software Integrity Engineer vs Software Quality Assurance Engineer?

AspectSoftware Integrity EngineerSoftware Quality Assurance Engineer
Primary FocusEnsuring software security, compliance, and integrity throughout developmentTesting and verifying software quality and functionality
Skills & CertificationsSecurity certifications (e.g., CISSP), coding, and security toolsTesting tools, QA methodologies, and certifications like ISTQB
Work EnvironmentDevelopment teams, security teams, and DevOpsQA teams, development teams, and testing labs
Industry UsageTech, finance, healthcare, where security is criticalSoftware development companies, app testing firms

While both roles focus on software quality, the Software Integrity Engineer emphasizes security, compliance, and software integrity, whereas the Software Quality Assurance Engineer concentrates on testing, functionality, and user experience. Understanding these differences helps organizations assign the right responsibilities and find suitable candidates.

What are popular job titles related to Software Integrity Engineer jobs in California?

For Software Integrity Engineer jobs in California, the most frequently searched job titles are:

What job categories do people searching Software Integrity Engineer jobs in California look for?

The top searched job categories for Software Integrity Engineer jobs in California are:

Software Integrity Engineer jobs near you
Infographic showing various Software Integrity Engineer job openings in California as of September 2026, with employment types broken down into 1% Internship, 1% As Needed, 83% Full Time, 12% Part Time, and 3% Contract. Highlights an 86% Physical, 3% Hybrid, and 11% Remote job distribution, with an average salary of $145,592 per year, or $70 per hour.

Power Integrity Engineer

San Jose, CA • On-site

Etched
See more jobs at Etchedexternal

$2.0K/mo

Full-time

Medical, Dental, Vision

Re-posted 14 days ago

Job description

About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are looking for a Power Integrity (PI) Engineer to join our platform electrical engineering team. In this role, you will own the power integrity methodology for high-power PCB and system designs - from early architecture through final release - ensuring robust power delivery to high-performance ASICs and supporting components across all operating conditions.
Key Responsibilities
  • Perform pre- and post-layout PDN analysis for high-current ASIC power rails: target impedance profiling, decoupling capacitor selection and placement optimization, and plane resonance analysis.
  • Execute DC IR-drop and current density simulations; define copper weight, plane shapes, via stitching, and layer allocation requirements for PCB designers.
  • Conduct AC impedance analysis from VRM output through package and die, including ESR/ESL modeling of the full decoupling network.
  • Develop and validate VRM models; analyze load transient response, AVP/load-line behavior, and multiphase converter performance against ASIC power specifications.
  • Perform power-plane thermal co-simulation and work with mechanical teams on thermal-electrical tradeoffs for high-current delivery.
  • Drive design rule checks for PI compliance; work with layout teams in Cadence Allegro / Sigrity PowerDC/PowerSI or Ansys SIwave.
  • Collaborate with power design, PCB layout, and ASIC/package teams to define power delivery architecture and review guidelines early in the product lifecycle.
  • Support bring-up, debug rail-level issues (droop, ripple, transient excursions), and document root-cause findings with clear corrective actions.
  • Develop and maintain simulation-to-hardware correlation databases to continuously improve PDN modeling accuracy.

You may be a good fit if you have (Must-have qualifications)
  • B.S. or M.S. in Electrical Engineering or a closely related discipline.
  • 5+ years of hands-on PI experience on high-current, high-performance designs (ASIC/CPU/GPU power delivery, server boards, or accelerator platforms).
  • Proficiency with industry PI EDA tools (Ansys SIwave, Cadence Sigrity PowerDC/PowerSI/OptimizePI, or equivalent).
  • Strong understanding of target impedance methodology, decoupling network design, plane resonances, and anti-resonance mitigation.
  • Experience with DC IR-drop analysis, current density limits, and via/plane current-carrying capacity.
  • Working knowledge of VRM fundamentals: buck converter operation, multiphase design, transient response, and load-line/AVP concepts.
  • Working knowledge of multi-layer PCB stack-up design and power plane allocation strategies.

Strong candidates may also have experience with (Nice-to-have qualifications)
  • Prior work in data center, AI/ML accelerator, networking, or high-performance computing (HPC) hardware environments.
  • Experience with vertical power delivery, high-current lateral delivery tradeoffs, or 48V-to-point-of-load architectures.
  • Package-level PDN co-analysis and experience working with die/package power models from ASIC teams.
  • Experience scripting automated PI simulation flows using Python or MATLAB to reduce manual simulation turnaround time.

Benefits
  • Medical, dental, and vision packages with generous premium coverage
    • $500 per month credit for waiving medical benefits
  • Housing subsidy of $2k per month for those living within walking distance of the office
  • Relocation support for those moving to San Jose (Santana Row)
  • Various wellness benefits covering fitness, mental health, and more
  • Daily lunch and dinner in our office
  • Unlimited compute budget subject to ROI justification

How we're different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.

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