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Soc Design Jobs (NOW HIRING)

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor SoC products, including IP design, analysis, integration, and validation. Collaborate with physical ...

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS), including sensor array timing control logic, analog-digital interface modules, and ISP (Image Signal ...

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS), including sensor array timing control logic, analog-digital interface modules, and ISP (Image Signal ...

SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS), including sensor array timing control logic, analog-digital interface modules, and ISP (Image Signal ...

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS), including sensor array timing control logic, analog-digital interface modules, and ISP (Image Signal ...

SoC Design Engineer

Santa Clara, CA · On-site

$110K - $140K/yr

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

SOC Design Verification Engineer

Dallas, TX · On-site

$127K - $156K/yr

SOC Design Verification Engineer Location: Redmond, WA (Onsite) Duration: 10 Months Minimum Qualifications • Track record of 'first-pass success' in ASIC development cycles. • Bachelor's degree ...

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

SoC Design Engineer

Santa Clara, CA · On-site

$110K - $140K/yr

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

SoC Design Engineer

Santa Clara, CA · On-site

$110K - $140K/yr

Knowledge of high performance and low power design techniques. * Knowledge of FPGA and emulation platforms. * Knowledge of SOC architecture. * Knowledge of assertion-based formal verification is a ...

Showing results 21-40

Soc Design information

See salary details

$80.5K

$139.4K

$182.5K

How much do soc design jobs pay per year?

As of Aug 7, 2026, the average yearly pay for soc design in the United States is $139,368.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What are the most common challenges encountered by SoC design engineers during the integration phase, and how can they be managed?

SoC Design engineers often face challenges during the integration phase, such as ensuring compatibility between diverse intellectual property (IP) blocks and managing complex system verification. These challenges can be managed by thorough documentation, using automated verification tools, and maintaining close collaboration with cross-functional teams including verification, firmware, and layout engineers. Regular integration reviews and adopting standardized interfaces also help minimize issues and streamline the process. Proactively addressing these challenges not only improves project timelines but also enhances the reliability of the final silicon.

What is SoC design?

SoC design refers to the process of designing a System on Chip, which is an integrated circuit that consolidates all components of a computer or electronic system onto a single chip. This includes the central processing unit (CPU), memory, input/output ports, and secondary storage, among others. SoC design is crucial in modern electronics, especially for mobile devices, IoT devices, and embedded systems, as it enables higher performance, lower power consumption, and smaller physical size. The process involves hardware architecture, verification, and often includes software integration to ensure all parts work together seamlessly.

What are the key skills and qualifications needed to thrive as a SoC design engineer?

To thrive as an SoC Design Engineer, you need a solid background in digital design, microarchitecture, and hardware description languages (HDLs) like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with EDA tools (such as Synopsys or Cadence), simulation platforms, and knowledge of industry standards like ARM or PCIe are essential, and certifications in hardware design can be advantageous. Strong problem-solving skills, teamwork, and effective communication set outstanding candidates apart in this collaborative and detail-oriented field. These skills are critical to ensure efficient, reliable, and innovative chip designs that meet performance, power, and cost requirements.

What is the difference between Soc Design vs Hardware Design?

AspectSoc DesignHardware Design
Required CredentialsBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields; certifications like IEEE are commonBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields; certifications like IEEE are common
Work EnvironmentDesigning integrated circuits and system architecture, often in collaborative teams within tech or semiconductor companiesCreating detailed hardware schematics, PCB layouts, and component specifications, typically in electronics or manufacturing firms
Employer & Industry UsageUsed by semiconductor companies, tech firms, and integrated circuit manufacturersUsed by electronics manufacturers, hardware companies, and embedded systems firms

Soc Design and Hardware Design share similar educational backgrounds and work environments, but Soc Design focuses on integrating multiple components into a single system-on-chip, while Hardware Design emphasizes creating individual hardware components and schematics. Both roles are essential in the electronics industry and often overlap in skills and tools used.

More about Soc Design jobs
What states have the most Soc Design jobs? States with the most job openings for Soc Design jobs include:
Infographic showing various Soc Design job openings in the United States as of August 2026, with employment types broken down into 1% Internship, 87% Full Time, 7% Part Time, and 5% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $139,368 per year, or $67 per hour.

SoC Design Engineer

OmniVision Technologies

Santa Clara, CA • On-site

$156K - $160K/yr

Other

Re-posted 7 hours ago


Job description

Job Title: SoC Design Engineer
Job Duties:
Be responsible for digital design of ASIC cores within image sensor SoC products, including IP design, analysis, integration, and validation. Collaborate with physical design teams on floor-planning, timing closure, and DFT implementation. Conduct timing control logic design and static timing analysis (STA) for sensor interfaces and mixed-signal integration. Perform chip bring-up, validation and debugging. Design, integrate and validate data pipeline according to PRD/design specification and system architecture of SoC products, following ASIC design flow: coding, simulation, synthesis, static timing analysis, formality verification, DFT, using Simvision, EDA tools such as Prime Time, cadence Virtuoso, Design Compiler, Integrator, and Verilog and System Verilog programming languages etc. Conduct design verification and modeling using SVA, Python, Perl, C++/C, and HLS. Work with digital and analog engineers for system design, integration and validation. Work with algorithm engineers for module level design, including hardware C model implementation, micro architecture design, RTL design and hardware/software co-simulation. Work with algorithm and application engineers for project-based microarchitecture improvements. Conduct silicon validation, debugging and tuning.
Requirements:
Master's degree or foreign equivalent degree in Electrical Engineering, Computer Engineering, or a related field.
Required skills and/or academic training in the following:
  • Arithmetic circuit design related to general datapath circuits, ML and AI circuits.
  • Arithmetic circuit design, timing analysis; synchronous and asynchronous FSMs; power, test, and debug.
  • Design and design debug with System Verilog; Logic design and analysis.
  • Processing Subsystem, including superscalar out-of-order cores, multicore and heterogeneous processors, and purpose-specific accelerators.
  • Design tools, such as microarchitecture simulators, RTL synthesis tools, and modeling for area, power, and thermal.
  • FPGA platforms to compute acceleration.
  • FPGAs technology, architecture and applications.
  • Register-Transfer Level (RTL) hardware design.
  • Planning and specification, writing Verilog models, and designing custom circuits and synthesized standard cell blocks.
  • Using industrial CAD tools and flows for digital, analog/RF, or mixed-signal chip design.
  • Full-chip integration and verification for tapeout.
Annual base salary for this role in California, US is expected to be between $156,853 - $160,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.