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Smps Design Engineer Jobs (NOW HIRING)

ECI

Senior Magnetics Design Engineer

Westfield, MA · On-site

$110K - $130K/yr

Our engineers are recognized experts and are unrivalled in their command of the esoteric and ... Minimum 5 years hands-on experience with magnetic component design and/or SMPS circuits * Strong ...

Apple

Baseband Hardware Design Engineer

Sunnyvale, CA · On-site

... design. The candidate will work proactively with other multi-functional engineering groups ... SMPS) Experience with high-speed and low-speed digital interfaces, e.g. PCIe, SPMI, I2C, UART etc.

Apple

Baseband Hardware Design Engineer

Sunnyvale, CA · On-site

... design. The candidate will work proactively with other cross-functional engineering groups ... SMPS) Experience with high-speed and low-speed digital interfaces, e.g. PCIe, SPMI, I2C, UART, etc.

Apple

Baseband Hardware Design Engineer

Waltham, MA · On-site

... design. The candidate will work proactively with other multi-functional engineering groups ... SMPS) Experience with high-speed and low-speed digital interfaces, e.g. PCIe, SPMI, I2C, UART etc ...

Apple

Baseband Hardware Design Engineer

Waltham, MA · On-site

... design. The candidate will work proactively with other multi-functional engineering groups ... SMPS) Experience with high-speed and low-speed digital interfaces, e.g. PCIe, SPMI, I2C, UART etc ...

Advanced Energy

Sr Electronic Engineer

Fort Collins, CO · On-site

$106K - $131K/yr

Expert-level experience in high-voltage and high-power switch-mode power supply (SMPS) design ... Master's degree in Electrical Engineering with a focus on Power Electronics or Control Systems ...

Apple

Baseband Hardware Design Engineer

Sunnyvale, CA · On-site

... design. The candidate will work proactively with other multi-functional engineering groups ... SMPS) Experience with high-speed and low-speed digital interfaces, e.g. PCIe, SPMI, I2C, UART etc.

Meta

EMC Design Engineer

Sunnyvale, CA · On-site

$173K - $245K/yr

As an EMC Design Engineer on Meta's Wearables Product Team, you will work directly with the ... battery, SMPS/LDO, Integrated circuits, antennas, memories, low/high speed buses, cables ...

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Smps Design Engineer information

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$38K

$89.7K

$170.5K

How much do smps design engineer jobs pay per year?

As of Aug 22, 2026, the average yearly pay for smps design engineer in the United States is $89,689.00, according to ZipRecruiter salary data. Most workers in this role earn between $66,500.00 and $102,000.00 per year, depending on experience, location, and employer.

What does an SMPS design engineer do?

An SMPS (Switched-Mode Power Supply) Design Engineer is responsible for designing, developing, and testing power supply circuits that efficiently convert electrical power using switching regulators. They work on selecting components, creating circuit schematics, simulating designs, and ensuring the final product meets performance, safety, and regulatory standards. Their role often involves troubleshooting, optimizing efficiency, and collaborating with other engineers to integrate power supplies into larger systems. SMPS Design Engineers are critical in industries like electronics, telecommunications, and automotive where efficient power management is essential.

What are the key skills and qualifications needed to thrive as an SMPS design engineer?

To thrive as an SMPS Design Engineer, you need a solid background in electrical engineering, power electronics, and circuit design, often supported by a relevant degree. Familiarity with simulation tools like SPICE, PCB design software, and knowledge of industry standards (such as IEC and UL) are typically required. Strong problem-solving skills, attention to detail, and effective communication help distinguish top performers in this role. These competencies are crucial for developing reliable, efficient switch-mode power supplies that meet safety and performance standards.

What are some common challenges faced by SMPS design engineers when working on new product development?

SMPS Design Engineers often encounter challenges such as meeting strict efficiency and thermal performance targets while minimizing size and cost. Balancing electromagnetic interference (EMI) compliance with power density requirements can also be complex. Additionally, collaborating with cross-functional teams—such as PCB layout engineers, firmware developers, and testing teams—requires clear communication to ensure design intent is maintained throughout the development cycle.

What is the difference between Smps Design Engineer vs Power Supply Test Engineer?

AspectSmps Design EngineerPower Supply Test Engineer
Primary FocusDesigning and developing switch-mode power supplies (SMPS)Testing and validating power supply units for performance and reliability
Skills & CertificationsElectronics design, circuit simulation, PCB layout, relevant certificationsTesting procedures, measurement tools, quality standards
Work EnvironmentDesign labs, R&D departments, manufacturing firmsTesting labs, quality assurance departments, manufacturing plants
Industry UsageElectronics, consumer appliances, industrial equipmentElectronics manufacturing, quality control, product validation

While both roles involve power supplies, the Smps Design Engineer focuses on creating and developing switch-mode power supplies, whereas the Power Supply Test Engineer specializes in testing and validating these units to ensure they meet quality standards.

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Smps Design Engineer jobs near you
Infographic showing various Smps Design Engineer job openings in the United States as of August 2026, with employment types broken down into 89% Full Time, 7% Part Time, and 4% Contract. Highlights an 83% Physical, 5% Hybrid, and 12% Remote job distribution, with an average salary of $89,689 per year, or $43.1 per hour.

Principle Hardware Design Engineer - Systems Engineering

Texas State Library and Archives Commision

Santa Clara, CA • On-site

$150K - $225K/yr

Full-time

Re-posted 26 days ago

Job description

Job Title: Principle Hardware Design Engineer - Systems Engineering
Location: Santa Clara, CA (100% On-site)
Position Type: Full-Time, Permanent
Base Salary Range: $150,680 - $225,700 / Year (Total Package pushes up to $225,000 - $301,900+ with bonuses/equity)
Benefits: Industry-leading Corporate Package (ESPP with 2-year lookback, Mental Health & Family Support)
Equity: Premium RSU Package (Standard 4-year vesting schedule)
Domain/Industry: Semiconductors / Cloud Compute & B2B Hardware Infrastructure
Position Overview:
A premier global innovator in semiconductor architecture and cloud infrastructure solutions is seeking a senior-level Principle Hardware Design Engineer to join their core Systems Engineering team in Santa Clara, CA.
This critical on-site role focuses on developing and designing cutting-edge reference boards for chip validation, working in close synchronization with enterprise, cloud, and AI network architectures. The successful candidate will drive high-speed PCB layouts, execute complex power integrity simulations, and maintain oversight across next-generation validation pipelines.
Key Responsibilities:
  • Reference Board Design: Lead the full lifecycle development and schematic capture of advanced reference boards specifically built for enterprise chip validation and AI compute systems.
  • High-Speed Architecture: Execute comprehensive engineering designs utilizing high-speed differential pairs, PCIe Gen4/Gen5 protocols, and complex PAM-4 signaling environments.
  • Power & Mechanical Engineering: Architect low-voltage, high-current, multi-phase SMPS (Switch Mode Power Supply) controllers and perform deep power integrity (PI) analysis across layouts.
  • Simulation & Tooling: Leverage advanced electronic design automation (EDA) and simulation software, including Sigrity, SI Soft, HFSS, and Cadence Concept, to ensure signal integrity.
  • Component Optimization: Manage absolute component selection, oversee high-frequency clock generation and distribution networks, and integrate structural mechanical design concepts into the PCB lifecycle.
Minimum Requirements (Strict Must-Haves):
  • Experience Level: Senior to Principal level professional background with a proven track record in high-speed hardware design and system-level engineering.
  • Technical Stack: Direct hands-on expertise with PCIe Gen4/Gen5, PAM-4 signaling, multi-phase SMPS design, and signal/power integrity simulation tools.
  • Tool Proficiency: Mastery of Cadence Concept, HFSS, Sigrity, or SI Soft for layout modeling and design validation.
  • Compliance & Legal: Must be fully eligible to access export-controlled technical information as strictly defined by U.S. export control laws, including the Export Administration Regulations (EAR).

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