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Silicon Design Engineer 2 Jobs (NOW HIRING)

SIG Sauer

Design Engineer II

Jacksonville, AR · On-site

Design Engineer II SIG SAUER, Inc . is a leading provider and manufacturer of firearms, electro-optics, ammunition, airguns, suppressors, remote controlled weapons stations, and training. For over ...

SigSauer

Design Engineer II

Jacksonville, AR

Design Engineer II SIG SAUER, Inc . is a leading provider and manufacturer of firearms, electro-optics, ammunition, airguns, suppressors, remote controlled weapons stations, and training. For over ...

SNAP Diagnostics

Design Engineer II

Anderson, SC

The Design Engineer II supports the design and development of outdoor power equipment (OPE) systems and components. Working under the guidance of senior engineers and engineering leadership, this ...

SIG Sauer

Design Engineer II

Exeter, NH · On-site

Design Engineer II SIG SAUER, Inc . is a leading provider and manufacturer of firearms, electro-optics, ammunition, airguns, suppressors, remote controlled weapons stations, and training. For over ...

SigSauer

Design Engineer II

Exeter, NH

Design Engineer II SIG SAUER, Inc . is a leading provider and manufacturer of firearms, electro-optics, ammunition, airguns, suppressors, remote controlled weapons stations, and training. For over ...

Microsoft

Senior Silicon CAD Engineer

Mountain View, CA · On-site

$160K - $261K/yr

We are looking for a Senior Silicon CAD Engineer specializing in technology enablement and PPA to ... two years thereafter. * This role will require access to information that is controlled for export ...

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Silicon Design Engineer 2 information

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$49.5K

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How much do silicon design engineer 2 jobs pay per year?

As of Sep 12, 2026, the average yearly pay for silicon design engineer 2 in the United States is $118,589.00, according to ZipRecruiter salary data. Most workers in this role earn between $100,000.00 and $137,000.00 per year, depending on experience, location, and employer.

What is a silicon design engineer?

Silicon Design Engineers are professionals who design and develop integrated circuits (ICs) and semiconductor chips used in electronic devices. They work on creating the architecture, logic, and physical layouts for chips that power everything from smartphones to computers and automotive systems. At the '2' level, these engineers typically have some experience and contribute to specific design tasks, verification, and testing under the guidance of senior engineers. Their work involves using specialized electronic design automation (EDA) tools and collaborating with cross-functional teams to ensure performance, power, and area requirements are met.

What skills and qualifications are needed to thrive as a silicon design engineer 2?

To thrive as a Silicon Design Engineer 2, you need a solid background in electrical engineering or computer engineering, with expertise in digital and analog circuit design and a relevant degree. Proficiency with hardware description languages (such as Verilog or VHDL), industry-standard EDA tools like Cadence or Synopsys, and familiarity with ASIC/FPGA design flows is typical. Strong problem-solving skills, teamwork, and effective communication help you collaborate across engineering teams and navigate complex design challenges. These skills are crucial to ensuring efficient, high-quality chip designs that meet performance and reliability requirements in competitive technology markets.

How does a silicon design engineer 2 typically collaborate with cross-functional teams during the chip development process?

As a Silicon Design Engineer 2, you will regularly work with teams such as verification, physical design, firmware, and product engineering to ensure the chip design meets performance, functionality, and manufacturability requirements. Collaboration often involves participating in design reviews, integrating feedback, and troubleshooting issues that arise during simulations or prototype testing. Effective communication and teamwork are essential, as your input will directly impact the project timeline and the final silicon product's success.

What cities are hiring for Silicon Design Engineer 2 jobs?

Cities with the most Silicon Design Engineer 2 job openings:

What states have the most Silicon Design Engineer 2 jobs?

States with the most job openings for Silicon Design Engineer 2 jobs include:

What are popular job titles related to Silicon Design Engineer 2 jobs?

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Infographic showing various Silicon Design Engineer 2 job openings in the United States as of August 2026, with employment types broken down into 88% Full Time, 7% Part Time, and 5% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution, with an average salary of $118,589 per year, or $57 per hour.

Sr. Staff Silicon Development Engineer

San Jose, CA • On-site

Advanced Micro Devices, Inc
Computer and Electronic Product Manufacturing • 5 - 10K employees
Learn more about Advanced Micro Devices, Incexternal

$175K/yr

Full-time

Posted 9 days ago

Advanced Micro Devices rating

8.6

Company rating: 8.6 out of 10

Based on 13 frontline employees who took The Breakroom Quiz

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.
At AMD, we believe technology has the power to solve the world's most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.
Whether you're designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we'll advance your career.
THE ROLE:
AMD is seeking a highly motivated Senior Staff Silicon Design Engineer to join our Silicon Design Engineering organization and contribute to the development of next-generation high-performance computing, AI, and graphics products. In this role, you will be a key contributor to the front-end design and DFT methodology team, driving design-for-test architecture, implementation, and silicon validation across complex SoCs.
You will collaborate closely with architecture, design, verification, physical design, product engineering, and manufacturing teams to ensure robust testability, high-quality silicon execution, and first-pass silicon success. This role offers the opportunity to influence DFT strategy and methodology while helping deliver industry-leading products to market.
THE PERSON:
The ideal candidate is a seasoned silicon engineer with strong expertise in Design-for-Test (DFT) architecture, implementation, and bring-up for complex semiconductor devices. You are a technical leader who thrives in a highly collaborative environment and can drive cross-functional efforts spanning design, verification, physical implementation, and product engineering.
You possess excellent analytical and problem-solving skills, demonstrate attention to detail, and are comfortable owning critical technical deliverables throughout the product lifecycle. You have a track record of independently driving complex projects, mentoring junior engineers, and influencing technical decisions across teams.
KEY RESPONSIBILITIES:
  • Define, implement, and verify DFT architectures and test features for complex SoCs and IP subsystems.
  • Drive scan insertion, ATPG generation, and test methodology development to achieve aggressive quality and coverage targets.
  • Develop and execute gate-level simulation strategies for ATPG pattern validation and test readiness.
  • Analyze test coverage, diagnose coverage gaps, and drive improvements in test quality, manufacturability, and test cost reduction.
  • Partner with design, verification, physical design, and product engineering teams to ensure successful DFT implementation throughout the development cycle.
  • Support silicon bring-up, manufacturing test execution, failure analysis, and yield improvement activities.
  • Contribute to the development and deployment of scalable DFT methodologies, automation solutions, and best practices across projects.
  • Provide technical leadership, mentorship, and guidance to engineers across the organization.

PREFERRED EXPERIENCE:
  • Strong understanding of the complete ASIC/SoC development flow, from RTL architecture through physical implementation and silicon bring-up.
  • Proven experience implementing DFT solutions for large-scale SoCs, including scan, compression, MBIST, LBIST, boundary scan, and related test technologies.
  • Strong RTL design and integration experience using Verilog and SystemVerilog.
  • Experience working with high-speed interfaces and complex IPs such as HBM, Die-to-Die (D2D), SerDes, PCIe, and memory subsystems.
  • Deep understanding of VLSI design principles, Design Automation methodologies, and IC development processes.
  • Working knowledge of physical design concepts including floorplanning, synthesis, place-and-route, timing closure, and Static Timing Analysis (STA).
  • Hands-on experience with industry-standard EDA tools such as Synopsys DFT Compiler, TestMAX, PrimeTime, VCS, and Cadence tool suites.
  • Experience with UVM/OVM verification methodologies, testbench development, BFMs, simulation environments, and debug workflows.
  • Familiarity with FPGA architectures and prototyping methodologies is a plus.
  • Strong scripting and automation skills using Perl, Tcl, Shell, Python, or similar languages.
  • Demonstrated ability to independently drive technical initiatives and solve complex engineering challenges.
  • Excellent written and verbal communication skills, with the ability to effectively collaborate across geographically distributed teams.
  • Proven ability to mentor engineers and contribute to technical leadership within an organization.

ACADEMIC CREDENTIALS:
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
LOCATION:
San Jose, CA (Hybrid)
#LI-MV1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.
This posting is for an existing vacancy.

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