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Signal Integrity Engineer Entry Level Jobs (NOW HIRING)

R&D/PRODUCT DVL ENGINEER I

Middletown, PA ยท On-site

$71K - $89K/yr

Job Overview As a R&D/Product Development Signal Integrity Engineer for TE Connectivity you will focus on the electrical design, simulation, and verification-validation testing of high speed products ...

... signal integrity, power integrity, EMI/EMC, RF engineering, antenna design, or other fields within applied electromagnetics Experience with measurements utilizing spectrum analyzers, network ...

As an RF Integrity Engineer, you will dive deep into package design, SI/PI, and RF technology to ... Execute critical Signal Integrity (SI) and Power Integrity (PI) analysis across both RF and digital ...

As an RF Integrity Engineer, you will dive deep into package design, SI/PI, and RF technology to ... Execute critical Signal Integrity (SI) and Power Integrity (PI) analysis across both RF and digital ...

We are looking for a dedicated and passionate SoC Power Integrity Engineer to join our team in ... D. with academic background in Power/Signal Integrity, Power Electronics or Analog Circuit Design.

As an RF Integrity Engineer, you will dive deep into package design, SI/PI, and RF technology to ... Execute critical Signal Integrity (SI) and Power Integrity (PI) analysis across both RF and digital ...

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Signal Integrity Engineer Entry Level information

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$127.5K

$168.5K

How much do signal integrity engineer entry level jobs pay per year?

As of Jun 27, 2026, the average yearly pay for signal integrity engineer entry level in the United States is $166,304.00, according to ZipRecruiter salary data. Most workers in this role earn between $167,000.00 and $167,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an Entry Level Signal Integrity Engineer, and why are they important?

To thrive as an Entry Level Signal Integrity Engineer, you need a solid background in electrical engineering principles, circuit analysis, and signal transmission, typically with at least a bachelor's degree in electrical engineering or a related field. Familiarity with simulation tools like SPICE, HFSS, and signal integrity analysis software, as well as knowledge of PCB design tools such as Altium or Cadence, is usually required. Strong problem-solving, analytical thinking, and effective communication skills help you collaborate with design teams and address complex technical challenges. These skills and qualifications are crucial for ensuring reliable high-speed electronic designs and successful product development.

What does a Signal Integrity Engineer Entry Level do?

A Signal Integrity Engineer Entry Level assists in analyzing and improving the quality of electronic signals in high-speed circuits and systems. They use simulation tools and measurement equipment to ensure signals maintain their integrity and are not degraded by interference, crosstalk, or other issues. Entry-level engineers work under the supervision of senior staff, often supporting PCB layout reviews, performing signal integrity simulations, and helping to troubleshoot signal problems in prototypes or products. This role is important in industries like telecommunications, computing, and electronics where reliable high-speed data transmission is critical.

What are the most common challenges faced by entry-level Signal Integrity Engineers during their first year on the job?

Entry-level Signal Integrity Engineers often encounter challenges such as quickly getting up to speed on complex simulation tools, understanding high-speed PCB design constraints, and interpreting signal integrity test results. Collaborating closely with senior engineers and cross-functional teams (like hardware design and PCB layout) is essential for troubleshooting and learning best practices. Overcoming the steep learning curve typically involves hands-on experience, continuous training, and actively seeking feedback from mentors.

What is the difference between Signal Integrity Engineer Entry Level vs RF Engineer Entry Level?

AspectSignal Integrity Engineer Entry LevelRF Engineer Entry Level
Required CredentialsBachelor's in Electrical Engineering or related; knowledge of signal integrity principlesBachelor's in Electrical Engineering, RF Engineering, or related; understanding of RF systems
Work EnvironmentDesign labs, testing facilities, and simulation environmentsDesign labs, testing, and field testing environments
Industry UsageElectronics, high-speed digital design, PCB developmentWireless, telecommunications, RF component design

Both roles require a background in electrical engineering and involve working with electronic systems. Signal Integrity Engineers focus on maintaining signal quality in high-speed digital circuits, while RF Engineers specialize in radio frequency systems and wireless communication. Entry-level professionals in both fields often share similar educational backgrounds and work environments, but their specific technical focus differs based on industry needs.

More about Signal Integrity Engineer Entry Level jobs
What cities are hiring for Signal Integrity Engineer Entry Level jobs? Cities with the most Signal Integrity Engineer Entry Level job openings:
What are the most commonly searched types of Signal Integrity Engineer jobs? The most popular types of Signal Integrity Engineer jobs are:
What job categories do people searching Signal Integrity Engineer Entry Level jobs look for? The top searched job categories for Signal Integrity Engineer Entry Level jobs are:
Infographic showing various Signal Integrity Engineer Entry Level job openings in the United States as of June 2026, with employment types broken down into 87% Full Time, and 13% Temporary. Highlights an 100% In-person job distribution, with an average salary of $166,304 per year, or $80 per hour.
Senior Signal Integrity / Power Integrity (SI/PI) Engineer

Senior Signal Integrity / Power Integrity (SI/PI) Engineer

Arista Networks

Santa Clara, CA โ€ข On-site

$300K - $655K/yr

Full-time

Medical, Dental, Vision

Posted 8 days ago


Job description

Company Description
Arista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus and routing environments. What sets us apart is our relentless pursuit of innovation. We leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge in an increasingly interconnected world. Our solutions are designed to not only meet the current demands of the digital landscape but to also anticipate and adapt to future challenges.
At Arista we value the diversity of thought and perspectives that each employee brings to the table. We believe that fostering an inclusive environment, where individuals from various backgrounds and experiences feel welcome, is essential for driving creativity and innovation.
Our commitment to excellence has earned us several prestigious awards, such as Best Engineering Team, Best Company for Diversity, Compensation, and Work-Life Balance. At Arista, we take pride in our track record of success and strive to maintain the highest standards of quality and performance in everything we do.
Job Description
Who You'll Work With
Arista's cutting-edge Ethernet and optical networking platforms are built to push the limits of performance, density, and power efficiency. This wouldn't be possible without our Signal Integrity (SI) and Power Integrity (PI) engineers who design, simulate, and characterize interconnects enabling the fastest SerDes technologies in the industry. We're looking for a Senior Signal Integrity / Power Integrity Hardware Engineer to join our Hardware Design team at our headquarters in Santa Clara, CA. In this role, you'll work at the intersection of advanced simulation, next-generation SerDes (112G/224G/448G PAM4), and innovative routing, packaging, and power delivery techniques. Your work will directly influence the architecture and layout of Arista's next-generation Ethernet and optical systems for hyperscale, AI, and cloud networking.
The total estimated annual compensation range for this position, inclusive of base salary, bonus, and equity, is $300,000 to $655,000. This range is a good faith estimate only. Bonus and equity are discretionary, subject to plan terms, and are not guaranteed components of total compensation. Actual total annual compensation may vary based on employee performance, company or equity performance, company policy, board approval, or similar factors. Please see additional base salary information below.
What You'll Do
  • Perform 3D EM design and simulation of high-speed interconnects (channels, vias, packages, and connectors) for 112G/224G PAM4 SerDes using tools such as Ansys HFSS, SiWave, and Cadence Sigrity.
  • Develop and validate test vehicles to characterize next-generation PCB materials, packages, and interconnects.
  • Conduct S-parameter and time-domain measurements (VNA, TDR, BERT) to extract channel performance and validate modeling correlation.
  • Perform link-level analysis for advanced standards (Ethernet 800G/1.6T, PCIe Gen6/Gen7, CXL) using tools such as Keysight ADS or Cadence SystemSI.
  • Collaborate closely with hardware, mechanical, and packaging teams to optimize stack- up, breakout, and routing strategies for high-density designs.
  • Research and prototype novel materials, backplane concepts, and low-loss interconnect topologies to meet next-generation performance targets.
  • Support bring-up and debug of production boards, working cross-functionally to root-cause SI/PI issues.

Qualifications
  • BS/MS/PhD in Electrical Engineering, Physics, or related field with a focus on electromagnetics, signal integrity, or high-speed digital design.
  • Solid understanding of signal integrity theory, S-parameter analysis, and channel modeling.
  • Hands-on experience with 2.5D/3D EM solvers (Ansys HFSS, SiWave, Sigrity, CST).
  • Strong lab skills using oscilloscopes, VNAs, TDRs, BERTs, and Ethernet compliance tools.
  • Familiarity with advanced PCB materials (e.g., Megtron 7, Tachyon 100G, SLP) and manufacturing constraints for high-speed design.
  • Experience analyzing and simulating 56G/112G/224G PAM4 and NRZ serial links.
  • Knowledge of power integrity and co-simulation techniques is a plus.
  • Excellent communication and collaboration skills.

Preferred Qualifications
  • Experience with co-packaged optics, chiplet-based architectures, or advanced substrate technologies.
  • Familiarity with EMI/EMC considerations and signal/power isolation in densely integrated photonic-electronic systems.
  • Understanding of thermal and mechanical effects on SI/PI performance and long-term reliability.
  • Experience working with fabrication vendors, ASIC teams, and contract manufacturers to ensure end-to-end channel integrity.

Base Salary Information:
The new hire base pay for this role has a pay range of $180,000 to $275,000. Arista offers different pay ranges based on work location, so that we can offer consistent and competitive pay appropriate to the market. The actual base pay offered will be based on a wide range of factors, including skills, qualifications, relevant experience, and work location. The salary range provided reflects base pay only. As described above, this position may also be eligible for discretionary Arista bonuses and equity. US- based employees are also entitled to benefits including medical, dental, vision, wellbeing, tax savings and income protection. The recruiting team can share more details during the hiring process specific to the role and location.
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Additional Information
Arista Networks is an equal opportunity employer. Arista makes all hiring and employment-related decisions in a non-discriminatory manner without regard to race, color, religion, sex, sexual orientation, gender identity, national origin or any other factor determined to be unlawful under applicable federal, state, or law law. All your information will be kept confidential according to EEO guidelines.