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Serdes Manager Jobs (NOW HIRING)

SerDes Circuit Design Engineer

Beaverton, OR · On-site

$210K/yr

While developing these complex IPs, on regular basis you will interact with your peers/management ... speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is highly desiredSkills in scripting and ...

SerDes Circuit Design Engineer

Beaverton, OR · On-site

$210K/yr

While developing these complex IPs, on regular basis you will interact with your peers/management ... SerDes protocols (e.g., PCIe, USB, DP, MPHY)Skills in scripting and automation to enhance ...

SerDes Circuit Design Engineer

San Diego, CA · On-site

$214K/yr

While developing these complex IPs, on regular basis you will interact with your peers/management ... SerDes protocols (e.g., PCIe, USB, DP, MPHY)Skills in scripting and automation to enhance ...

While developing these complex IPs, on regular basis you will interact with your peers/management ... SerDes protocols (e.g., PCIe, USB, DP, MPHY) Skills in scripting and automation to enhance ...

SerDes Circuit Design Engineer

San Diego, CA · On-site

$214K/yr

While developing these complex IPs, on regular basis you will interact with your peers/management ... speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is highly desiredSkills in scripting and ...

While developing these complex IPs, on regular basis you will interact with your peers/management ... speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is highly desired Skills in scripting and ...

While developing these complex IPs, on regular basis you will interact with your peers/management ... speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is highly desired Skills in scripting and ...

SerDes Circuit Design Engineer

Cupertino, CA · On-site

$249K/yr

While developing these complex IPs, on regular basis you will interact with your peers/management ... speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is highly desiredSkills in scripting and ...

SerDes Circuit Design Engineer

Cupertino, CA · On-site

$249K/yr

While developing these complex IPs, on regular basis you will interact with your peers/management ... speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is highly desiredSkills in scripting and ...

SerDes Circuit Design Engineer

Melbourne, FL · On-site

$187K/yr

While developing these complex IPs, on regular basis you will interact with your peers/management ... speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is highly desiredSkills in scripting and ...

While developing these complex IPs, on regular basis you will interact with your peers/management ... speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is highly desired Skills in scripting and ...

While developing these complex IPs, on regular basis you will interact with your peers/management ... speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is highly desired Skills in scripting and ...

While developing these complex IPs, on regular basis you will interact with your peers/management ... speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is highly desired Skills in scripting and ...

While developing these complex IPs, on regular basis you will interact with your peers/management ... SerDes protocols (e.g., PCIe, USB, DP, MPHY) Skills in scripting and automation to enhance ...

While developing these complex IPs, on regular basis you will interact with your peers/management ... speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is highly desired Skills in scripting and ...

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Serdes Manager information

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$29K

$104.6K

$118K

How much do serdes manager jobs pay per year?

As of Jun 7, 2026, the average yearly pay for serdes manager in the United States is $104,575.00, according to ZipRecruiter salary data. Most workers in this role earn between $114,000.00 and $116,500.00 per year, depending on experience, location, and employer.

What is a Serdes Manager?

A Serdes Manager is a professional responsible for overseeing the design, development, and integration of serializer/deserializer (SerDes) technology in electronic systems. SerDes technology is essential for high-speed data transmission between chips, boards, or systems, commonly used in data centers, telecommunications, and consumer electronics. The manager leads a team of engineers, coordinates project timelines, ensures compliance with industry standards, and collaborates with other departments to deliver reliable and efficient SerDes solutions. This role requires deep technical knowledge as well as strong leadership and project management skills.

What are the key skills and qualifications needed to thrive as a Serdes Manager, and why are they important?

To thrive as a Serdes Manager, you need a deep understanding of high-speed serial communication protocols, signal integrity, and experience in designing SerDes (Serializer/Deserializer) architectures, typically backed by a degree in electrical engineering or a related field. Familiarity with industry-standard EDA tools (such as Cadence or Synopsys), lab measurement equipment, and knowledge of standards like PCIe and Ethernet are essential, and certifications in project management or relevant technical areas can be advantageous. Exceptional leadership, communication, and problem-solving skills help manage cross-functional teams and drive project success. These combined skills ensure the efficient development of robust SerDes solutions that meet performance, reliability, and time-to-market goals in advanced technology environments.

What are some common challenges faced by a Serdes Manager in coordinating multidisciplinary teams?

A Serdes Manager often works with teams that include analog, digital, firmware, and validation engineers, which can sometimes lead to communication gaps and alignment issues. Managing project timelines while accommodating the different development cycles of each discipline is a frequent challenge. Additionally, ensuring that integration and verification processes run smoothly across hardware and software groups requires strong organizational and leadership skills. Building a collaborative environment and setting clear expectations are key to overcoming these challenges.
What are the most commonly searched types of Serdes jobs? The most popular types of Serdes jobs are:
Infographic showing various Serdes Manager job openings in the United States as of May 2026, with employment types broken down into 3% As Needed, 94% Part Time, 2% Temporary, and 1% Nights. Highlights an 87% Physical, 8% Hybrid, and 5% Remote job distribution, with an average salary of $104,575 per year, or $50.3 per hour.
SerDes Circuit Design Engineer

SerDes Circuit Design Engineer

Apple

Beaverton, OR • On-site

$210K/yr

Full-time

Posted 6 days ago


Apple rating

8.1

Company rating: 8.1 out of 10

Based on 661 frontline employees who took The Breakroom Quiz

6th of 30 rated technology retailers


Job description

We are seeking talented Analog Mixed-Signal designers to join our high-speed SerDes team. Our team specializes in building next generation high-performance wireline transceivers delivering intellectual-property (IP) for Apple's world-leading system-on-chip (SOC). ..In this role, you will actively work with cross-functional Analog Mixed-Signal design teams to create, execute and drivestate-of-the-art IPs key to Apple's products. You will be challenged to make the best-in-class designs to surprise and delight Apple customers. With transforming the user experience in focus, you will get an opportunity to work on designs which makes the best systems. This enables you to learn end-to-end system while exceeding the highest expectations of quality, innovation and efficiency. ..If you have strong fundamentals and a track record of tackling technical challenges, ..If you are passionate about learning new skills and improving the value of your work, ..If you like to be tuned to the big picture while diving deeply into the details to innovate and tackle problems. ..We invite you to join and grow with our team!
You will work on the development of high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, phase interpolator, DLL, VCO, LDO) with best-in-class power, performance, and area (PPA). You will be leading discussions with cross-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create and drive block-level specifications, mixed-signal implementations and behavioral modeling. You will closely work with SOC teams to deliver IP views and make sure they meet the quality standards. While developing these complex IPs, on regular basis you will interact with your peers/management to communicate progress, discuss new ideas and drive new implementations/concepts making it a rewarding and growth-oriented work environment.
BS and a minimum of 10 years relevant industry experience.
Deep understanding of analog mixed-signal design with experience in high-speed serial links.Experience of designing analog mixed signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, FiltersUnderstanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques Understanding and experience with digitally assisted analog design concepts (e.g. background calibrations, LMS based adaptive loops)Proven track record of working with system and architecture teams to drive block-level and IP requirements for high-speed IO in 100+ Gbps NRZ and PAM applicationsProven track record of working with large teams and guiding junior engineers to develop circuit components required in TX, RX, PLL etc. of a high-speed IO.Experience with high-speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.) with solid understanding of digital design concepts Experience and solid understanding of Tx/Rx equalization techniques and circuits (e.g. CTLE, DFE, de-emphasis) for 100+ Gbps NRZ and PAM applications Experience with EQ adaptation methods and circuit implementations to improve PPASolid understanding of CDR architectures and implementationsExperience in Analog Mixed Signal circuit modeling and performance evaluation (e.g. SystemVerilog, Matlab, Python, VerilogAMS)Hands-on experience to drive lab testing, debug and data analysisHands-on experience in advanced CMOS technologies, design with FinFet technology Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization Concepts of timing closure and related industry tools (e.g., Nanotime, Primetime)Concepts of IP delivery and quality checks Knowledge of common high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is highly desiredSkills in scripting and automation to enhance efficiency are highly desirable

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About Apple

Sourced by ZipRecruiter

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976