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Senior Analog Layout Engineer Jobs in Georgia (NOW HIRING)

Senior Verification Engineer

Suwanee, GA · Hybrid

$150K - $225K/yr

Senior Verification Engineer Also open to staff, principal, or senior principal level engineers ... Experience with digital and analog simulation tools: VCS, Xcellieum, Verdi Compensation: * $150K ...

Sr Aerospace Engineer

Atlanta, GA

$102K - $140K/yr

As a Senior Avionics Engineer, you will lead the design, development, integration, and testing of ... Perform analog, digital, and mixed-signal circuit design for control, communication, propulsion ...

New

Senior Hardware Engineer

Atlanta, GA · On-site

$106K - $141K/yr

Job Summary The Senior Hardware Engineer will be a member of a team responsible for designing ... Work closely with layout engineers * Work closely with the FPGA/FW/Test engineering team during ...

Performing schematic capture, assessing signal integrity, and guiding PCB layout. * Working with ... Expertise in analog and digital circuit design, including simulation, design, and testing of high ...

Showing results 21-40

Senior Analog Layout Engineer information

What are some common challenges senior analog layout engineers face when collaborating with circuit designers, and how can they be addressed?

Senior Analog Layout Engineers often encounter challenges such as translating complex circuit schematics into efficient physical layouts while meeting stringent performance requirements. Miscommunications or differing priorities between layout engineers and circuit designers can lead to design iterations or delays. To address these challenges, it’s important to establish clear communication channels, participate in regular design reviews, and use collaborative tools for feedback and issue tracking. Being proactive in discussing layout constraints and providing early feedback can help ensure that both layout and performance goals are achieved efficiently.

What is a senior analog layout engineer?

Senior Analog Layout Engineers are experienced professionals who design and implement the physical layout of analog integrated circuits (ICs) such as amplifiers, data converters, and power management chips. They translate circuit schematics into detailed layouts that ensure optimal electrical performance, reliability, and manufacturability. Their responsibilities include working closely with circuit designers, performing layout-versus-schematic (LVS) checks, and using specialized Electronic Design Automation (EDA) tools. Senior engineers often mentor junior staff and help resolve complex layout challenges. Their expertise is critical in ensuring the final chip meets specifications and industry standards.

What is the difference between Senior Analog Layout Engineer vs Analog IC Design Engineer?

AspectSenior Analog Layout EngineerAnalog IC Design Engineer
Primary FocusPhysical layout and implementation of analog circuitsDesign and simulation of analog circuits
Skills RequiredLayout tools, fabrication process knowledge, circuit understandingCircuit theory, schematic design, simulation skills
Work EnvironmentFoundries, semiconductor companies, R&D labsDesign teams, R&D departments, EDA tool usage
Common UsageInvolved in physical design phaseInvolved in circuit conceptualization and schematic design

While both roles require a strong understanding of analog circuits, the Senior Analog Layout Engineer focuses on translating circuit schematics into physical layouts, ensuring manufacturability and performance. In contrast, the Analog IC Design Engineer primarily designs and simulates the circuits themselves. Both roles often collaborate but differ in their core responsibilities and skill sets.

What are the key skills and qualifications needed to thrive as a senior analog layout engineer?

To thrive as a Senior Analog Layout Engineer, you need deep knowledge of analog/mixed-signal IC layout, semiconductor device physics, and experience with advanced CMOS processes, typically supported by a relevant engineering degree. Proficiency with EDA tools such as Cadence Virtuoso, Mentor Graphics, and DRC/LVS verification systems is essential. Attention to detail, problem-solving, and strong collaboration skills set standout professionals apart in this role. These abilities ensure high-performance, reliable chip designs that meet stringent industry standards and project timelines.
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Sr High-Speed SerDes Design Engineer (Remote)

Encore Semi, Inc.

Atlanta, GA • On-site, Remote

$135K - $165K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 3 days ago

New


Job description

Sr High-Speed SerDes Design Engineer (Remote)
Full-Time: Competitive Salary + Benefits + Bonuses | Contractor Opportunities Available
Work Authorization: US Citizen or Lawful Permanent Resident
Location: 100% Remote (Anywhere in the USA)
We are looking for a Sr High-Speed SerDes Design Engineer who enjoys solving some of the toughest challenges in analog/mixed-signal IC design. If you have hands-on experience designing high-speed SerDes, PLLs, TX/RX data paths, and have worked through the realities of advanced process nodes (5nm and below), we would love to connect.
You will be part of a highly skilled engineering team developing next-generation high-performance silicon where speed, power, jitter, and reliability matter.
Required Qualifications
BS, MS, or PhD in Electrical Engineering or a related discipline.
8+ years of hands-on analog/mixed-signal IC design experience.
Strong expertise in the design of High-Speed SerDes, including PLLs, TX/RX circuits, CDRs, clock generation, and high-speed analog interfaces.
Proven transistor-level circuit design experience from architecture through silicon validation.
Successful tapeout experience in advanced CMOS process technologies (FinFET and 5nm beyond preferred).
Experience working with one or more leading semiconductor foundries.
Proficiency with industry-standard analog and mixed-signal IC design, simulation, verification, and physical verification EDA tools.
Strong understanding of signal integrity, jitter analysis, power optimization, and high-speed circuit design techniques.
Preferred Qualifications
Experience with silicon bring-up, characterization, and post-silicon debug.
Familiarity with high-speed interface standards such as PCIe, Ethernet, CXL, USB, MIPI, DDR, HBM, UCIe, or similar protocols.
Experience collaborating with cross-functional teams including Layout, Digital Design, Physical Design, Verification, Packaging, Test, and Systems Engineering.
Excellent problem-solving, communication, and technical leadership skills.
Experience mentoring junior engineers and leading technical initiatives.
Why Join Us
Work on challenging, high-impact silicon designs with a team of engineers who are passionate about pushing the limits of performance and innovation.
If you have designed SerDes at the transistor level and want to work on genuinely hard problems, we'd love to hear from you.
The anticipated annual base salary for this position is between $135,000 to $165,000, which also includes a comprehensive benefits package.
Full-Time Benefits:
•15 days of PTO per calendar year
•10 paid Holidays per calendar year
•Comprehensive Medical Benefits: Company covers 80% of premiums for Employee and Dependents
•Dental & Vision: Company covers 50% of premiums for Employee and Dependents
•Voluntary Benefits: Life Insurance, FSA (Health and Dependent, Limited Purpose), HAS, and Gap Insurance
•Employee Assistant Program (EAP)
•401k - Traditional & Roth
•Life/AD&D and Long-Term Disability
•Tuition reimbursement
Equal Opportunity Policy Statement
Encore Semi, Inc. is an Equal Opportunity Employer that does not discriminate on the basis of actual or perceived race, religion, creed, color, age, sex, sexual orientation, gender, gender identity or expression, national origin, genetics, ancestry, marital status, civil union status, medical condition, disability (mental and physical), military and veteran status, pregnancy, childbirth and related medical conditions, or any other characteristic protected by applicable federal, state, or local laws and ordinances.
Encore Semi is also committed to compliance with all fair employment practices regarding citizenship and immigration status.
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