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Semiconductor Yield Defect Engineer Jobs (NOW HIRING)

Backend Process Engineer

Alhambra, CA · On-site

$100K - $135K/yr

... Semiconductor Optical Amplifiers (SOAs), and Gain Chip products. This role provides technical ... Drive singulation yield improvement and defect reduction through data analysis and root-cause ...

Backend Process Engineer

Alhambra, CA · On-site

$100K - $135K/yr

... Semiconductor Optical Amplifiers (SOAs), and Gain Chip products. This role provides technical ... Drive singulation yield improvement and defect reduction through data analysis and root-cause ...

Showing results 41-60

Semiconductor Yield Defect Engineer information

What does a semiconductor yield defect engineer do?

A Semiconductor Yield Defect Engineer is responsible for analyzing and improving the yield in semiconductor manufacturing by identifying, characterizing, and reducing defects during production. They use advanced inspection tools and statistical analysis to monitor wafer defects and work closely with process engineers to implement corrective actions. Their goal is to maximize the number of functional chips produced from each wafer, which directly impacts production efficiency and cost. This role is critical in ensuring high product quality and competitiveness in the semiconductor industry.

What are the key skills and qualifications needed to thrive as a semiconductor yield defect engineer?

To thrive as a Semiconductor Yield Defect Engineer, you need a solid background in electrical engineering, semiconductor physics, and data analysis, typically supported by a relevant engineering degree. Familiarity with defect analysis tools (such as SEM, FIB, and TEM), statistical process control software, and yield management systems is crucial. Strong problem-solving skills, attention to detail, and effective communication set exceptional candidates apart in this field. These capabilities are essential for accurately identifying yield-limiting defects, driving process improvements, and collaborating across teams to ensure high product quality and manufacturing efficiency.

What are some common challenges faced by semiconductor yield defect engineers when identifying and mitigating yield loss in manufacturing processes?

Semiconductor Yield Defect Engineers often encounter challenges such as distinguishing between process-induced defects and random contamination, analyzing large sets of complex data to pinpoint root causes, and implementing corrective actions without disrupting production timelines. The fast-paced and highly technical work environment requires continuous collaboration with process engineers, equipment specialists, and quality control teams. Staying current with evolving fabrication technologies and defect analysis tools is essential for effective problem-solving and ongoing professional growth.

What is the difference between Semiconductor Yield Defect Engineer vs Semiconductor Process Engineer?

AspectSemiconductor Yield Defect EngineerSemiconductor Process Engineer
Primary FocusIdentifying and analyzing defect sources to improve yieldDeveloping and optimizing manufacturing processes
Skills & CertificationsKnowledge of failure analysis, microscopy, and defect inspection; often requires engineering degreeProcess development, equipment operation, and process control skills; engineering degree often required
Work EnvironmentCleanroom, laboratory, failure analysis labsManufacturing floors, cleanrooms, process labs
Industry UsageCommonly used in semiconductor fabrication facilitiesUsed across semiconductor manufacturing stages

The Semiconductor Yield Defect Engineer primarily focuses on analyzing defects to improve chip yield, while the Semiconductor Process Engineer concentrates on developing and refining manufacturing processes. Both roles require technical expertise and work in similar environments, but their core responsibilities differ in focus and daily tasks.

What are popular job titles related to Semiconductor Yield Defect Engineer jobs?

For Semiconductor Yield Defect Engineer jobs, the most frequently searched job titles are:

Infographic showing various Semiconductor Yield Defect Engineer job openings in the United States as of September 2026, with employment types broken down into 1% Internship, 89% Full Time, 7% Part Time, and 3% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution.

Dry Etch module development engineer

Hillsboro, OR • On-site

Intel
Manufacturing • 10K+ employees

Full-time

Medical, Retirement, PTO

Re-posted 24 days ago


Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz


Job description

Job Details:Job Description: Note: This role is only open to external candidates with industry dry etch experience from leading equipment suppliers or advanced foundries. You will operate in a high impact space, partnering closely with cross functional teams (Process Integration, Manufacturing, Equipment Engineering, Yield/Defect Engineering, and suppliers) to solve complex technical challenges and establish long term systems that sustain performance. This role requires regular onsite presence to fulfill essential job responsibilities.Drives technology development for both high volume manufacturing and future technology, provides process integration and equipment solutions, and performs feasibility studies to meet desired device specifications. Own and drive development of next generation patterning processes, including process architecture, optimization strategies, and qualification methodologies.Performs pathfinding activities in support of process and hardware development on existing and first of kind equipment, enabling manufacturing of innovative device architectures and develops roadmaps for technologies enabling future roadmap. Provide technical leadership for cross functional problem solving to resolve complex process and defect issues; drive structured root cause, containment, and permanent corrective actions.Design and execute comprehensive characterization plans; plan and conduct experiments (DOE/response surface/robustness studies) across the development cycle.Establish and mature control systems to optimize and sustain production performance (SPC, control plans, alarms, response plans, recipe governance, sustaining systems).Develop strategies and infrastructure to resolve difficult problems and implement systems to manage these problems in the future (standard work, monitoring, dashboards/analytics, knowledge capture).Drive improvements in yield, reliability, cost, productivity, and process capability, ensuring scalable transfer to manufacturing and ongoing sustainment.Influence technical direction, mentor engineers (as appropriate for grade), and communicate status/risks clearly to stakeholders.Recommends and implements modifications for operating equipment to improve production efficiency, manufacturing techniques, and optimizing production output for existing products. Partners with key equipment and materials suppliers to develop and implement enabling elements of the technology. Performs process technology feasibility studies through theoretical simulations and/or practical engineering methods.Qualifications:Minimum Qualifications - PhD in Chemical Engineering, Materials Science, Physics, Electrical Engineering, or a semiconductor related STEM field with 4+ years of industry experience in dry etch at a leading foundry or equipment supplier with relevant experience.Or- Master's degree in Chemical Engineering, Materials Science, Physics, Electrical Engineering, or a semiconductor related STEM field with 6+ years of industry experience in dry etch at a leading foundry or equipment supplier with relevant experience.Or-Bachelor's degree in Chemical Engineering, Materials Science, Physics, Electrical Engineering, or a semiconductor related STEM field with 8+ years of industry experience in dry etch at a leading foundry or equipment supplier with relevant experience.Relevant recent experience includes, but is not limited to:- Hands-on experience in dry etch semiconductor manufacturing, including ownership of process development and optimization. - Strong command of plasma etch fundamentals, including plasma generation, plasma-surface interactions, selectivity, profile control, and defect mechanisms.- Demonstrated record of delivering dry etch process solutions that improved yield, reliability, performance, or manufacturability for advanced technology nodes at foundry or suppliers. - Expertise in statistical analysis and DOE methodologies, using tools such as JMP, Python, or MATLAB to drive data-based decisions.Preferred Qualifications:- 5+ years of direct experience developing and deploying dry etch processes for advanced logic or foundry technologies.- Experience with advanced dry etch technologies such as: ICP / CCP plasma etch, High aspect ratio etch (HARC), Atomic Layer Etch (ALE), Radical and Vapor phase isotropic etching, Ash and surface treatments, EUV patterned layer etch integration. - Demonstrated ability to manage complex process challenges and provide solutions such as pattern fidelity, CD control, defectivity, variability reduction, or process window expansion. - Strong understanding of logic BEOL interconnects and their etch integration requirements.- Experience with materials and device characterization techniques, including SEM, TEM, CD SEM, AFM, XPS, or electrical correlation. - Ability to define technical approaches, de risk options, and guide less senior engineers through complex problem solving.- Proven ability to lead technical problem solving across projects, influencing peers and stakeholders without formal people management responsibility.- Evidence of broader technical influence, such as internal technology disclosures, patents, publications, or recognized subject matter expertise within the organization. - Strong collaboration and problem-solving skills to work effectively in cross-disciplinary teams. - Proven ability to communicate technical data and concepts to both technical and non-technical audiences. Join Intel's dynamic team and contribute to groundbreaking advancements in technology. Help us shape the future today.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $133,800.00-255,200.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

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Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968