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Semiconductor Yield Defect Engineer Jobs (NOW HIRING)

Semtech

Backend Process Engineer

Alhambra, CA

$100K - $135K/yr

... Semiconductor Optical Amplifiers (SOAs), and Gain Chip products. This role provides technical ... Drive singulation yield improvement and defect reduction through data analysis and root-cause ...

Semtech

Backend Process Engineer

Alhambra, CA · On-site

$100K - $135K/yr

... Semiconductor Optical Amplifiers (SOAs), and Gain Chip products. This role provides technical ... Drive singulation yield improvement and defect reduction through data analysis and root-cause ...

Intel

WLA Yield Analysis Systems Eng

Albuquerque, NM · On-site

$98K - $193K/yr

... metrology / defect reduction experience * Demonstrated ability to deal with engineering ... Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while ...

Intel

WLA Yield Analysis Systems Eng

Hillsboro, OR · On-site

$98K - $193K/yr

... metrology / defect reduction experience * Demonstrated ability to deal with engineering ... Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while ...

Intel

WLA Yield Analysis Systems Eng

Phoenix, AZ · On-site

$98K - $193K/yr

... metrology / defect reduction experience * Demonstrated ability to deal with engineering ... Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while ...

Samsung Electronics

Systems Engineer

Taylor, TX · On-site

... advanced semiconductor technology, seeking an engineer to support Yield Management System ... defect reduction efforts. Responsibilities : • Take full ownership of system including source ...

onsemi

Process Engineer - Defect Systems

Hopewell, NY · On-site

$65K - $102K/yr

The position's primary focus is to develop and improve the defect yield management system. This ... Semiconductor processing experience or coursework * Familiar with 5S, 8D, 6-sigma, SPC, DOE, FMEA ...

OMNIVISION

Sr. Product Engineer

Santa Clara, CA · On-site

$131K - $135K/yr

... semiconductor processing tool vendors to optimize processes, including raw material vendor, IMP ... Analyze the correlation among Yield/Defect/Inline/Reliability and reduce lost. * Assess CMOS ...

OMNIVISION

Sr. Product Engineer

Santa Clara, CA

$131K - $135K/yr

... semiconductor processing tool vendors to optimize processes, including raw material vendor, IMP ... Analyze the correlation among Yield/Defect/Inline/Reliability and reduce lost. * Assess CMOS ...

OMNIVISION

Sr. Product Engineer

Santa Clara, CA

... semiconductor processing tool vendors to optimize processes, including raw material vendor, IMP ... Analyze the correlation among Yield/Defect/Inline/Reliability and reduce lost. * Assess CMOS ...

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Semiconductor Yield Defect Engineer information

What is the difference between Semiconductor Yield Defect Engineer vs Semiconductor Process Engineer?

AspectSemiconductor Yield Defect EngineerSemiconductor Process Engineer
Primary FocusIdentifying and analyzing defect sources to improve yieldDeveloping and optimizing manufacturing processes
Skills & CertificationsKnowledge of failure analysis, microscopy, and defect inspection; often requires engineering degreeProcess development, equipment operation, and process control skills; engineering degree often required
Work EnvironmentCleanroom, laboratory, failure analysis labsManufacturing floors, cleanrooms, process labs
Industry UsageCommonly used in semiconductor fabrication facilitiesUsed across semiconductor manufacturing stages

The Semiconductor Yield Defect Engineer primarily focuses on analyzing defects to improve chip yield, while the Semiconductor Process Engineer concentrates on developing and refining manufacturing processes. Both roles require technical expertise and work in similar environments, but their core responsibilities differ in focus and daily tasks.

What are the key skills and qualifications needed to thrive as a Semiconductor Yield Defect Engineer, and why are they important?

To thrive as a Semiconductor Yield Defect Engineer, you need a solid background in electrical engineering, semiconductor physics, and data analysis, typically supported by a relevant engineering degree. Familiarity with defect analysis tools (such as SEM, FIB, and TEM), statistical process control software, and yield management systems is crucial. Strong problem-solving skills, attention to detail, and effective communication set exceptional candidates apart in this field. These capabilities are essential for accurately identifying yield-limiting defects, driving process improvements, and collaborating across teams to ensure high product quality and manufacturing efficiency.

What are some common challenges faced by Semiconductor Yield Defect Engineers when identifying and mitigating yield loss in manufacturing processes?

Semiconductor Yield Defect Engineers often encounter challenges such as distinguishing between process-induced defects and random contamination, analyzing large sets of complex data to pinpoint root causes, and implementing corrective actions without disrupting production timelines. The fast-paced and highly technical work environment requires continuous collaboration with process engineers, equipment specialists, and quality control teams. Staying current with evolving fabrication technologies and defect analysis tools is essential for effective problem-solving and ongoing professional growth.

What does a Semiconductor Yield Defect Engineer do?

A Semiconductor Yield Defect Engineer is responsible for analyzing and improving the yield in semiconductor manufacturing by identifying, characterizing, and reducing defects during production. They use advanced inspection tools and statistical analysis to monitor wafer defects and work closely with process engineers to implement corrective actions. Their goal is to maximize the number of functional chips produced from each wafer, which directly impacts production efficiency and cost. This role is critical in ensuring high product quality and competitiveness in the semiconductor industry.
Infographic showing various Semiconductor Yield Defect Engineer job openings in the United States as of May 2026, with employment types broken down into 100% Full Time. Highlights an 88% Physical, 4% Hybrid, and 8% Remote job distribution.
Process Integration Engineer

Process Integration Engineer

Samsung Semiconductor, Inc.

Austin, TX

$83K - $206K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 23 days ago

Samsung Electronics rating

7.0

Company rating: 7.0 out of 10

Based on 48 frontline employees who took The Breakroom Quiz

104th of 139 rated electronics manufacturers

Job description

About Samsung Austin Semiconductor
Samsung is a world leader in advanced semiconductor technology, founded on the belief that the pursuit of excellence creates a better world. At SAS, we are Innovating Today to Power the Devices of Tomorrow.

Come innovate with us!

Position Summary

NTB Team open Position: NTB process integration engineer or NTB module representative (RMG module)
The New Technology Bridge (NTB) team focuses on new technology development, device targeting, and yield and defect improvement. This talented group of team members also handle design weak point optimization via mask DOE, process manufacturability, and new technology qualification.
In your role as the Process Integration Engineer, you'll be responsible for understanding of 8,10,14,28nm process flows, including process integration, yield enhancement, electrical test (ET), reliability, BKMs, and DOEs.
You'll work to design, analyze layout weak points, and verify results using physical measurements (TEM, SEM).

Role and Responsibilities

Here's what you'll be responsible for:

  • Managing projects related to new technology development and qualification, yield improvement, and other quality KPI improvements.
  • Designing, executing, and analyzing experiments.
  • Utilizing software to analyze data including statistical analysis;
  • Consulting with leadership team on experimental results in order to make decisions about large-scale changes.
  • Trouble shooting issues affecting Yield, defect, electrical performance of products.
  • Developing Change Point Management plans.
  • Communicating technical information with presentation.

Skills and Qualifications

Here's what you'll need:

  • Bachelor's degree in Physics, Chemistry, Electrical Engineering, Chemical Engineering, Materials Science or related field with 2+ years of experience in semiconductor industry (Master's or PhD is preferred)
  • In-depth understanding of Replacement Metal Gate (RMG) module integration is preferred.
  • Basic understanding of unit processes including thin films deposition, lithography, etch, diffusion, wet process, Cu plating, and CMP.

All positions at Samsung Austin Semiconductor are 5 days onsite.

The current base salary range for this role is between $83,000 - $206,000. Individual base pay rates will depend on factors including duties, work location, education, skills, qualifications and experience. Total compensation for this position will include a competitive benefits package and may include participation in company incentive compensation programs, which are based on factors to include organizational and individual performance.

Total Rewards
At Samsung SAS, base pay is just one part of our total compensation package. The base compensation for this role will depend on education, experience, skills, and location.

We offer a comprehensive benefits package, including:

  • Medical, dental, and vision insurance
  • Life insurance and 401(k) matching with immediate vesting
  • Onsite cafe(s) and workout facilities
  • Paid maternity and paternity leave
  • Paid time off (PTO) + 2 personal holidays and 10 regular holidays
  • Wellness incentives and MORE

Eligible full-time employees (salaried or hourly) may also receive MBO bonuses based on company, division, and individual performance.

All positions at SAS are full-time on-site.

U.S. Export Control Compliance
This role requires access to information subject to U.S. export control laws. Applicants must be authorized to access such information or eligible for government authorization.

Trade Secrets Notice
By submitting an application, you agree not to disclose to Samsung-or encourage Samsung to use-any confidential or proprietary information (including trade secrets) belonging to a current or former employer or other entity.

* Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page. If you are European Economic Resident, please click here.

* Samsung Electronics America, Inc. and its subsidiaries are committed to employing a diverse workforce, and provide Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.

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