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Semiconductor Yield Defect Engineer Jobs (NOW HIRING)

onsemi

SiC Yield Enhancement Engineer

Livonia, NY · On-site

... experience in semiconductor yield, process integration, or defect engineering (SiC preferred ... Strong skills in DOE, SPC, statistical analysis tools, and semiconductor process fundamentals.

Samsung Semiconductor, Inc.

Yield Engineer

Taylor, TX · On-site

$92K - $206K/yr

About Samsung Austin Semiconductor Samsung is a world leader in advanced semiconductor technology ... Define and execute defect reduction strategies. Partner with Module and Process Integration ...

Samsung Electronics

Yield Engineer

Taylor, TX · On-site

$92K - $206K/yr

About Samsung Austin Semiconductor Samsung is a world leader in advanced semiconductor technology ... Define and execute defect reduction strategies. Partner with Module and Process Integration ...

Intel

WLA Yield Defect Metrology Engineer

Hillsboro, OR · On-site

... semiconductor fabrication, assembly and test plants. This role requires regular onsite presence to fulfill essential job responsibilities. The Inline Wafer Level Assembly (WLA) Defect Metrology ...

Samsung Electronics Co., Ltd.

Yield Engineer

Taylor, TX · On-site

$92K - $206K/yr

About Samsung Austin Semiconductor Samsung is a world leader in advanced semiconductor technology ... Define and execute defect reduction strategies. Partner with Module and Process Integration ...

Intel

WLA Yield Defect Metrology Engineer

Hillsboro, OR · On-site

... semiconductor fabrication, assembly and test plants. This role requires regular onsite presence to fulfill essential job responsibilities. The Inline Defect Metrology Engineer: * Provides process ...

onsemi

Defect Management Engineer

Livonia, NY · On-site

Driving yield and reliability improvement activities * Serving as a core technical leader ... Minimum 4 years of experience in Defect Engineering or Defect Management within semiconductor ...

Samsung Semiconductor

Systems Engineer

Taylor, TX · On-site

... advanced semiconductor technology, seeking an engineer to support Yield Management System ... defect reduction efforts. Responsibilities : • Take full ownership of system including source ...

TSMC

Sr. Yield Enhancement Engineer

Camas, WA · On-site

$92K - $124K/yr

As a Yield Enhancement (Defect) Engineer, this position will be working within the PIE department in a dynamic and fast paced environment where sustain semiconductor manufacturing line stability is a ...

TSMC

Sr. Yield Enhancement Engineer

Camas, WA · On-site

$92K - $124K/yr

As a Yield Enhancement (Defect) Engineer, this position will be working within the PIE department in a dynamic and fast paced environment where sustain semiconductor manufacturing line stability is a ...

Amat

Process Integration & Yield Engineer

Chandler, AZ · On-site

$164K - $225K/yr

Position Summary The Principal Process Integration & Yield Engineering Services Engineer is a ... defect, and process integration challenges in semiconductor manufacturing. This role applies deep ...

Amat

Process Integration & Yield Engineer

Hillsboro, OR · On-site

$164K - $225K/yr

Position Summary The Principal Process Integration & Yield Engineering Services Engineer is a ... defect, and process integration challenges in semiconductor manufacturing. This role applies deep ...

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Semiconductor Yield Defect Engineer information

What is the difference between Semiconductor Yield Defect Engineer vs Semiconductor Process Engineer?

AspectSemiconductor Yield Defect EngineerSemiconductor Process Engineer
Primary FocusIdentifying and analyzing defect sources to improve yieldDeveloping and optimizing manufacturing processes
Skills & CertificationsKnowledge of failure analysis, microscopy, and defect inspection; often requires engineering degreeProcess development, equipment operation, and process control skills; engineering degree often required
Work EnvironmentCleanroom, laboratory, failure analysis labsManufacturing floors, cleanrooms, process labs
Industry UsageCommonly used in semiconductor fabrication facilitiesUsed across semiconductor manufacturing stages

The Semiconductor Yield Defect Engineer primarily focuses on analyzing defects to improve chip yield, while the Semiconductor Process Engineer concentrates on developing and refining manufacturing processes. Both roles require technical expertise and work in similar environments, but their core responsibilities differ in focus and daily tasks.

What are the key skills and qualifications needed to thrive as a Semiconductor Yield Defect Engineer, and why are they important?

To thrive as a Semiconductor Yield Defect Engineer, you need a solid background in electrical engineering, semiconductor physics, and data analysis, typically supported by a relevant engineering degree. Familiarity with defect analysis tools (such as SEM, FIB, and TEM), statistical process control software, and yield management systems is crucial. Strong problem-solving skills, attention to detail, and effective communication set exceptional candidates apart in this field. These capabilities are essential for accurately identifying yield-limiting defects, driving process improvements, and collaborating across teams to ensure high product quality and manufacturing efficiency.

What are some common challenges faced by Semiconductor Yield Defect Engineers when identifying and mitigating yield loss in manufacturing processes?

Semiconductor Yield Defect Engineers often encounter challenges such as distinguishing between process-induced defects and random contamination, analyzing large sets of complex data to pinpoint root causes, and implementing corrective actions without disrupting production timelines. The fast-paced and highly technical work environment requires continuous collaboration with process engineers, equipment specialists, and quality control teams. Staying current with evolving fabrication technologies and defect analysis tools is essential for effective problem-solving and ongoing professional growth.

What does a Semiconductor Yield Defect Engineer do?

A Semiconductor Yield Defect Engineer is responsible for analyzing and improving the yield in semiconductor manufacturing by identifying, characterizing, and reducing defects during production. They use advanced inspection tools and statistical analysis to monitor wafer defects and work closely with process engineers to implement corrective actions. Their goal is to maximize the number of functional chips produced from each wafer, which directly impacts production efficiency and cost. This role is critical in ensuring high product quality and competitiveness in the semiconductor industry.
Infographic showing various Semiconductor Yield Defect Engineer job openings in the United States as of May 2026, with employment types broken down into 100% Full Time. Highlights an 88% Physical, 4% Hybrid, and 8% Remote job distribution.
Process & Defect Engineer

Process & Defect Engineer

Polar Semiconductor

Bloomington, MN • On-site

$111K - $154K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 10 days ago

Job description

Role Summary
The Senior Staff / Principal Process & Defect Engineer is responsible for driving defect reduction, process development, and cross-functional project execution across wafer fabrication operations. This role owns defect strategy, excursion response, and process improvement initiatives, while partnering with integration, equipment, and operations teams to improve yield, stability, and manufacturability.
Defect Engineering & Yield Ownership
  • Own defect performance across assigned process areas (FEOL/BEOL integration loops)
  • Lead defect excursion response, lot disposition (MRB / ICAR support), and root cause analysis
  • Drive defect reduction strategy using Pareto, correlation, and signature mapping
  • Define monitoring strategies (KLA / inspection layers) and OCAP triggers

Process Development & Optimization
  • Design and execute DOE experiments and split lot analysis
  • Optimize inspection strategies, recipes, and tool conditions
  • Develop Best Known Methods (BKM)
  • Support new process introduction and evaluate defect risks

Cross-Functional Project Leadership
  • Lead multi-discipline yield and defect reduction projects
  • Coordinate across process, equipment, operations, and defect teams
  • Drive project execution, timelines, and technical deliverables
  • Present findings and recommendations to leadership

Defect Metrology & Tool Strategy
  • Own defect inspection tools (KLA, SEM)
  • Develop inspection recipes and sensitivity optimization
  • Ensure tool matching and data consistency
  • Translate defect signatures into process actions

Manufacturing Support & Continuous Improvement
  • Support fab operations and escalation response
  • Improve communication and passdown structure
  • Standardize defect workflows and documentation
  • Identify improvements for cycle time and efficiency

Qualifications
Required:
  • Bachelor's or higher in:
    • Electrical Engineering, Materials Science, Chemical Engineering, Physics, or related field
  • 8+ years (Senior) or 12+ years (Principal) in:
    • Semiconductor manufacturing
    • Defect engineering, yield, or process integration
  • Strong background in:
    • Defect inspection (KLA, SEM review)
    • Data analysis (JMP, Python, SQL, or equivalent)
    • DOE and statistical analysis

Preferred:
  • Experience with:
    • Cross-functional fab leadership
    • Project/program management
    • new product development (NPD) learning cycles
  • Knowledge of:
    • SPC systems
    • Yield modeling and defect classification systems

*Please note that this position may require U.S. Citizenship or Permanent Residency status in the future depending on federal requirements*
What We Offer
Salary: The estimated base salary range for the position is $111,000-$154,000. The pay offered is based on many factors including, but not limited to, relevant education, job-related experience, skills and level of the position.
Benefits & Other Eligible Compensation: Includes health, dental, vision, disability and life insurance, 401(k) plan with company match, paid time off, annual bonus, and tuition reimbursement.
Polar Semiconductor is an Equal Opportunity Employer and prohibits discrimination and harassment of any kind. We are committed to the principle of equal employment opportunity for all employees and to providing employees with a work environment free of discrimination and harassment. All employment decisions are based on business needs, job requirements, and individual qualifications, without regard to race, color, religion, sex, sexual orientation, gender identity, age, national origin, disability, veteran status, or any other status protected by the laws or regulations in the locations where we operate.
About Minneapolis/St. Paul Area
Our offices and manufacturing facility are located in Bloomington, Minnesota, a suburb of Minneapolis. Living in the Minneapolis / Saint Paul area offers a strong sense of community, a vibrant arts and music scene, and abundant outdoor activities year-round. The city boasts a lower cost of living than many major metros, excellent parks and lakes, and a well-educated workforce with diverse job opportunities. Its distinct seasons bring variety, from colorful autumns to lively summers filled with festivals and waterfront activities.

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