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Semiconductor Yield Defect Engineer Jobs (NOW HIRING)

Defect Engineer

Fort Collins, CO · On-site

$109K - $175K/yr

Job Overview As a Defect Engineer within the Wireless Semiconductor Division (WSD) at Broadcom Inc ... yield enhancement. * Technical Expertise: Strong working knowledge of multiple semiconductor ...

Defect Engineer

Fort Collins, CO · On-site

$102K - $133K/yr

Job Overview As a Defect Engineer within the Wireless Semiconductor Division (WSD) at Broadcom Inc ... yield enhancement. * Technical Expertise: * Strong working knowledge of multiple semiconductor ...

NY · On-site

$107K - $147K/yr

... power semiconductor manufacturing line. Responsibilities * Implement equipment and process ... yield. * Manage Material Review Board (MRB) activities including defect dispositioning, hold ...

Defect Engineer

Fort Collins, CO · On-site

$101K - $133K/yr

Job Overview As a Defect Engineer within the Wireless Semiconductor Division (WSD) at Broadcom Inc ... yield enhancement. * Technical Expertise: * Strong working knowledge of multiple semiconductor ...

$70K - $97K/yr

... for the power semiconductor manufacturing line. You will implement equipment and process ... yield. Manages Material Review Board (MRB) activities including defect dispositioning, hold ...

The position's primary focus is to develop and improve the defect yield management system. This ... Semiconductor processing experience or coursework * Familiar with 5S, 8D, 6-sigma, SPC, DOE, FMEM ...

NY · On-site

$70K - $97K/yr

... for the power semiconductor manufacturing line. You will implement equipment and process ... yield. Manages Material Review Board (MRB) activities including defect dispositioning, hold ...

Defect Engineer

Marcy, NY · On-site

$70K - $97K/yr

... for the power semiconductor manufacturing line. You will implement equipment and process ... yield. Manages Material Review Board (MRB) activities including defect dispositioning, hold ...

Defect Engineer

Marcy, NY · On-site

$70K - $97K/yr

... for the power semiconductor manufacturing line. You will implement equipment and process ... yield. Manages Material Review Board (MRB) activities including defect dispositioning, hold ...

The position's primary focus is to develop and improve the defect yield management system. This ... Semiconductor processing experience or coursework * Familiar with 5S, 8D, 6-sigma, SPC, DOE, FMEM ...

NY · On-site

$70K - $97K/yr

Provide technical and sustaining engineering support for the power semiconductor manufacturing line ... yield. Manage Material Review Board (MRB) activities, including defect dispositioning, hold ...

The New Mexico Silicon Manufacturing (NM Si Mfg) Yield Department is seeking Process Integration and Defect Reduction Engineers to support interconnect and advanced packaging semiconductor ...

SkyWater is hiring a highly skilled and experienced Semiconductor Yield Staff Engineer to lead the integration of new technologies into our fab. The successful candidate will play a critical role in ...

SkyWater is hiring a highly skilled and experienced Semiconductor Yield Principal Engineer to lead the integration of new technologies into our fab. The successful candidate will play a critical role ...

EMIB-T Substrate Yield Lead

Phoenix, AZ · On-site

$17.75 - $23.75/hr

Hands-on experience in substrate, advanced packaging, or semiconductor yield engineering, including statistical analysis, defect reduction, process optimization, SPC, DFM/DFY, defect metrology ...

Yield Staff Engineer

Bloomington, MN · On-site

$95K - $142K/yr

SkyWater is hiring a highly skilled and experienced Semiconductor Yield Staff Engineer to lead the integration of new technologies into our fab. The successful candidate will play a critical role in ...

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Semiconductor Yield Defect Engineer information

What does a semiconductor yield defect engineer do?

A Semiconductor Yield Defect Engineer is responsible for analyzing and improving the yield in semiconductor manufacturing by identifying, characterizing, and reducing defects during production. They use advanced inspection tools and statistical analysis to monitor wafer defects and work closely with process engineers to implement corrective actions. Their goal is to maximize the number of functional chips produced from each wafer, which directly impacts production efficiency and cost. This role is critical in ensuring high product quality and competitiveness in the semiconductor industry.

What are the key skills and qualifications needed to thrive as a semiconductor yield defect engineer?

To thrive as a Semiconductor Yield Defect Engineer, you need a solid background in electrical engineering, semiconductor physics, and data analysis, typically supported by a relevant engineering degree. Familiarity with defect analysis tools (such as SEM, FIB, and TEM), statistical process control software, and yield management systems is crucial. Strong problem-solving skills, attention to detail, and effective communication set exceptional candidates apart in this field. These capabilities are essential for accurately identifying yield-limiting defects, driving process improvements, and collaborating across teams to ensure high product quality and manufacturing efficiency.

What are some common challenges faced by semiconductor yield defect engineers when identifying and mitigating yield loss in manufacturing processes?

Semiconductor Yield Defect Engineers often encounter challenges such as distinguishing between process-induced defects and random contamination, analyzing large sets of complex data to pinpoint root causes, and implementing corrective actions without disrupting production timelines. The fast-paced and highly technical work environment requires continuous collaboration with process engineers, equipment specialists, and quality control teams. Staying current with evolving fabrication technologies and defect analysis tools is essential for effective problem-solving and ongoing professional growth.

What is the difference between Semiconductor Yield Defect Engineer vs Semiconductor Process Engineer?

AspectSemiconductor Yield Defect EngineerSemiconductor Process Engineer
Primary FocusIdentifying and analyzing defect sources to improve yieldDeveloping and optimizing manufacturing processes
Skills & CertificationsKnowledge of failure analysis, microscopy, and defect inspection; often requires engineering degreeProcess development, equipment operation, and process control skills; engineering degree often required
Work EnvironmentCleanroom, laboratory, failure analysis labsManufacturing floors, cleanrooms, process labs
Industry UsageCommonly used in semiconductor fabrication facilitiesUsed across semiconductor manufacturing stages

The Semiconductor Yield Defect Engineer primarily focuses on analyzing defects to improve chip yield, while the Semiconductor Process Engineer concentrates on developing and refining manufacturing processes. Both roles require technical expertise and work in similar environments, but their core responsibilities differ in focus and daily tasks.

What are popular job titles related to Semiconductor Yield Defect Engineer jobs?

For Semiconductor Yield Defect Engineer jobs, the most frequently searched job titles are:

Infographic showing various Semiconductor Yield Defect Engineer job openings in the United States as of September 2026, with employment types broken down into 1% Internship, 89% Full Time, 7% Part Time, and 3% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution.

Defect Engineer

Fort Collins, CO • On-site

Broadcom Inc.
Semiconductor and Electronic Component Manufacturing • 10K+ employees

$109K - $175K/yr

Other

Medical, Dental, Vision, Retirement, PTO

Re-posted 28 days ago


Broadcom rating

8.7

Company rating: 8.7 out of 10

Based on 23 frontline employees who took The Breakroom Quiz


Job description

Job Overview

As a Defect Engineer within the Wireless Semiconductor Division (WSD) at Broadcom Inc., you will play a critical role in identifying, analyzing, and minimizing defectivity within our FBAR filter fabrication process. Utilizing inline visual inspection and physical analysis data, you will separate killer from cosmetic defects, map out defect Pareto charts, and provide actionable insights to the cross‑functional fab team. Your work directly minimizes yield loss and reliability failures downstream at wafer sort, assembly, test, and the end customer.

Key ResponsibilitiesDefect Detection & Root Cause Analysis
  • Establish Technology Baselines: Utilize advanced metrology and physical analysis data (SEM, TEM, AFM, FIB) to define baseline defectivity and establish Pareto charts for new and existing technologies.
  • Identify Source Failures: Pinpoint offending tools, processes, or facility infrastructure driving defect excursions.
  • Excursion Containment: Initiate corrective actions (PDCA, 8D), place under‑performing tools down, and issue material containment for non‑conforming or out‑of‑control (OOC) material.
  • Lab Characterization: Partner with the Physical Analysis Lab (PAL) and bench testing teams to submit jobs and successfully characterize unique defect signatures.
  • Process Improvement: Partner with integration and process engineers to improve defect performance and identify new defects on emerging process nodes.
Controls, Strategy & Line Monitoring
  • Own the Visual Control Plan: Define line partitioning, monitoring, and sampling strategies using Klarity and Statistical Process Control (SPC) to maintain stringent fab defect controls.
  • Author OCAPs: Write and maintain Out‑of‑Control Action Plans (OCAPs) to establish standard operational responses to defect shifts.
  • Material Disposition: Act as the primary engineering escalation point to disposition OOC material that falls beyond the scope of engineering technicians.
  • Identify and characterize novel defect modes through detect, contain, eliminate procedures.
Team Leadership & Culture
  • Lead task forces: Facilitate and lead cross‑functional engineering teams investigating complex trend shifts and high‑volume defectivity issues.
  • Lead model building activities to hypothesize and validate root causes of defectivity.
  • Train and Mentor: Train operations staff on material disposition and mentor engineering technicians in advanced defect identification and characterization techniques.
  • Quality First Mindset: Actively drive a low‑defect, "quality before speed and cost" culture across the entire fab footprint.
Required Skills & Qualifications
  • Education: BS in Electrical Engineering, Materials Science, Physics, Chemistry, or a related engineering field.
  • Experience: 8+ years in high‑volume wafer fabrication, specifically within process engineering, defect engineering, or yield enhancement.
  • Technical Expertise: Strong working knowledge of multiple semiconductor fabrication process modules (e.g., photo, etch, deposition, CMP, test); expertise with Klarity defect analysis software and Statistical Process Control (SPC); advanced proficiency using JMP for statistical data analysis and engineering problem‑solving.
  • Leadership & Drive: Proven track record of independently facilitating cross‑functional teams to resolve highly complex manufacturing problems.
  • Communication: Demonstrated ability to communicate technical data clearly and concisely, both verbally and in writing, to audiences ranging from cleanroom operators to fab executives.
  • Soft Skills: Detail‑oriented multitasker with strong self‑awareness—knows when and who to ask for cross‑functional help.
Preferred Skills & Qualifications
  • Education: MS or PhD in Electrical Engineering, Materials Science, Physics, Chemistry, or a related field.
  • Experience: 12+ years in high‑volume semiconductor manufacturing.
  • Advanced Material Analytics: Direct hands‑on tracking and root‑cause identification using physical analysis lab (PAL) tool outputs (SEM, TEM, AFM, FIB).
  • Data Automation & Programming: Proficiency in programming languages (e.g., Python, SQL); experience with Python data structures (Pandas/NumPy), spatial math, geometric logic, and parsing raw file formats (such as .klarf files).
  • Data Visualization: Experience developing automated Spotfire data links and interactive dashboards optimized for a production wafer manufacturing environment.
  • Advanced Automation & AI: Practical experience with defect data automation, automatic defect detection/classification (ADC) software, or implementing AI models for wafer map pattern recognition.
  • Other Requirements: Strict adherence to cleanroom protocols, contamination controls, and fab safety standards.
Compensation and Benefits
  • Annual base salary range: $109,700 - $175,500.
  • Eligible for discretionary annual bonus in accordance with the relevant plan documents.
  • Equity in accordance with equity plan documents and equity award agreements.
  • Benefits: Medical, dental and vision plans; 401(K) participation with company matching; Employee Stock Purchase Program (ESPP); Employee Assistance Program (EAP); company paid holidays; paid sick leave and vacation time; compliance with applicable laws for Paid Family Leave and other leaves of absence.
Equal Opportunity Employer

Broadcom is proud to be an equal‑opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

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