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Remote Vhdl Verilog Jobs (NOW HIRING)

This is a remote position that will include occasional travel to our Mountain View office location. Key Responsibilities: * Deliver end-to-end FPGA Modem Solution based on VHDL or System Verilog.

Experience with VHDL or Verilog and FPGA development toolchains (e.g., Vivado, Quartus, Libero ... Our positions are based in Reston, Virginia, with much of our team operating in a hybrid or remote ...

... Remote Eligible Yes Base Salary Range: $112000 - $168000 Descriptions & Requirements and ... Strong knowledge of hardware description languages (Verilog,SystemVerilog, VHDL) and verification ...

Experience with VHDL or Verilog and FPGA development toolchains (e.g., Vivado, Quartus, Libero ... Our positions are based in Reston, Virginia, with much of our team operating in a hybrid or remote ...

Principal Engineer - FPGA

Skaneateles, NY · On-site +1

$141K - $172K/yr

Have strong experience in FPGA development (Verilog/VHDL/SystemVerilog). * Have a proven ability to ... Candidates for this role (office-based/ hybrid/ remote) must be located in or near the locations ...

Principal Engineer - FPGA

Skaneateles, NY · On-site +1

$141K - $172K/yr

Have strong experience in FPGA development (Verilog/VHDL/SystemVerilog). * Have a proven ability to ... Candidates for this role (office-based/ hybrid/ remote) must be located in or near the locations ...

Showing results 21-31

Remote Vhdl Verilog information

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$85K

$147.3K

$198.5K

How much do remote vhdl verilog jobs pay per year?

As of Sep 4, 2026, the average yearly pay for remote vhdl verilog in the United States is $147,315.00, according to ZipRecruiter salary data. Most workers in this role earn between $130,000.00 and $167,000.00 per year, depending on experience, location, and employer.

What is the difference between Remote Vhdl Verilog vs Remote FPGA Design Engineer?

AspectRemote Vhdl VerilogRemote FPGA Design Engineer
Required CredentialsVHDL/Verilog certifications, FPGA design experienceVHDL/Verilog certifications, FPGA design experience
Work EnvironmentRemote, collaborative with hardware teamsRemote, hardware and software integration teams
Industry UsageASIC/FPGA development, digital designFPGA development, embedded systems
Common Search IntentDesign, simulation, verification of digital circuitsFPGA implementation, prototyping, testing

Remote Vhdl Verilog roles focus on digital hardware description and simulation, while Remote FPGA Design Engineers typically handle FPGA implementation and integration. Both require similar skills and certifications but differ in their specific application and project scope.

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Infographic showing various Remote Vhdl Verilog job openings in the United States as of August 2026, with employment types broken down into 98% Full Time, and 2% Contract. Highlights an 91% Physical, 7% Hybrid, and 2% Remote job distribution, with an average salary of $147,315 per year, or $70.8 per hour.

RISC-V CPU Microarchitecture / RTL

Tenstorrent

Santa Clara, CA • On-site, Remote

$100K - $500K/yr

Full-time

Posted 15 days ago


Key responsibilities

  • Define and develop microarchitecture specifications for the RISC-V CPU unit, including analysis for verification and PPA closure.

  • Responsible for RTL design, review, refinement, and verification to ensure quality and optimization for power, performance, and area.

  • Use AI tools to assist in CPU design processes and potentially mentor junior engineers based on experience level.


Job description

RISC-V CPU RTL owner will play a key role in developing next-generation CPU design. This position requires a deep understanding of CPU design including Architecture, RTL, Design Verification, Physical Design Flow. The ideal candidate will drive the unit specification, RTL design, and unit verification.

This role is Remote, based out of The United States or Spain.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Key Responsibilities:

  • RISC-V CPU Unit Microarchitecture Specification: Define and develop microarchitecture specifications for the assigned unit (branch predictor, rename, instruction scheduling, vector execution, load/store, vector load/store support). The specification includes not only design, but also comprehensive analysis / strategy for verification and PPA (power, performance, area) closure.
  • RISC-V CPU Core Unit RTL Design: The candidate will be responsible for the quality of RTL including design verification and PPA closure. This includes writing RTL, reviewing / refining unit verification environment, applying right RTL optimization to control PPA.
  • AI Assisted Design Adaption: To maximize the team's output, the candidate actively uses AI tools to accelerate the CPU design process.
  • Mentoring Junior Engineers: depending on a seniority of the engineer, the engineer may mentor junior members in the team.

Qualifications:

  • Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Proven track record of designing high-performance CPU RTL for x86, Arm, POWER, SPARC, or RISC-V.
  • Deep understanding of design verification strategy and trade-offs for verification methodology (simulation, formal, various checkers, etc...)
  • Deep understanding of CPU microarchitecture and PPA trade-off.
  • Basic understanding of RISC-V Architecture including V-extension is preferred.
  • Proficiency in hardware description languages (HDLs) such as Verilog, SystemVerilog or VHDL.
  • Excellent problem-solving abilities and analytical skills.
  • Strong communication skills, with the ability to convey complex technical concepts to diverse audiences.
  • Ability to work collaboratively in a team-oriented environment and across multiple disciplines.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology.  Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2).   These requirements apply to persons located in the U.S. and all countries outside the U.S.  As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency.  If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.