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Remote Silicon Photonics Engineer Jobs (NOW HIRING)

MatX

Silicon Architect, AI Accelerator

Mountain View, CA · On-site +1

$175K - $450K/yr

Programming, code optimization, or kernel-level performance analysis experience. * Excellent ... In exceptional cases, remote work arrangements may be considered. Compensation The US base salary ...

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Remote Silicon Photonics Engineer information

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$106.4K

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How much do remote silicon photonics engineer jobs pay per year?

As of Aug 15, 2026, the average yearly pay for remote silicon photonics engineer in the United States is $106,386.00, according to ZipRecruiter salary data. Most workers in this role earn between $76,000.00 and $132,500.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a remote silicon photonics engineer?

A Remote Silicon Photonics Engineer typically requires a strong background in photonics, optics, and semiconductor physics, often supported by an advanced degree in electrical engineering or physics. Expertise in simulation and design tools such as Lumerical, COMSOL Multiphysics, and experience with photonic integrated circuit (PIC) design and fabrication processes are crucial. Exceptional problem-solving abilities, self-motivation, and effective remote communication skills help individuals excel in collaborative, distributed engineering teams. These competencies ensure the successful design, development, and optimization of innovative photonic devices and systems in a rapidly evolving technological field.

What are the main collaboration tools and practices used by remote silicon photonics engineers to work effectively with cross-functional teams?

Remote silicon photonics engineers typically rely on a combination of cloud-based simulation platforms, video conferencing, and project management tools to collaborate with design, fabrication, and testing teams. Regular virtual meetings and shared documentation ensure alignment on complex project requirements and timelines. Additionally, version control systems and collaborative design environments help maintain consistency and transparency across geographically distributed teams. Effective communication and proactive problem-solving are crucial to overcoming the challenges of remote technical work in this highly specialized field.

What is a remote silicon photonics engineer?

A Remote Silicon Photonics Engineer is a professional who designs, develops, and tests photonic devices and systems using silicon as the primary material, often working from a remote location. These engineers focus on integrating optical components onto silicon chips to enable faster data transmission in fields such as telecommunications, data centers, and computing. Their work typically involves simulation, modeling, fabrication processes, and collaborating with multidisciplinary teams using digital communication tools. Remote roles allow engineers to contribute to projects from anywhere, leveraging cloud-based platforms and remote lab access.
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Remote Silicon Photonics Engineer jobs near you
Infographic showing various Remote Silicon Photonics Engineer job openings in the United States as of August 2026, with employment types broken down into 92% Full Time, 2% Part Time, and 6% Contract. Highlights an 86% Physical, 5% Hybrid, and 9% Remote job distribution, with an average salary of $106,386 per year, or $51.1 per hour.

DFT Engineer (MBIST) - Remote / C2C

Purple Hires Inc

Plano, TX • Remote

$139K - $143K/yr

Contractor

Posted 4 days ago

Job description

Role: Senior MBIST Engineer
Location: Remote- Must be working as per PST time zone
Duration: Contract (Full-Time)

Job Description:

We are looking for a highly experienced Senior MBIST Contractor to join our SoC Design-for-Test (DFT) team. The role is focused on hands-on Memory BIST implementation using Synopsys MBIST (SMS). The ideal candidate is an independent contributor who can own the complete MBIST flow from insertion through verification, simulation, pattern generation, and Silicon bring-up with minimal supervision.

Responsibilities:

• Perform MBIST insertion for complex SoC designs using Synopsys SMS.
• Integrate and verify MBIST at the top level.
• Develop, execute, and debug MBIST simulations using Synopsys VCS, including:
– RTL
– No-delay gate level simulations
– With-delay (timing-aware) simulations
• Generate and validate MBIST test patterns using Vecgen.
• Debug RTL, simulation, and MBIST integration issues.
• Support silicon bring-up, characterization, and post-silicon debug related to MBIST, memory failures, and DFT infrastructure.
• Work closely with DFT, RTL, Physical Design, and Product Engineering teams to resolve implementation issues.
• Drive issue resolution independently and document implementation flows and debug findings.

Required Qualifications:

8+ years of hands-on DFT experience, with significant focus on MBIST.
• Strong experience with Synopsys MBIST (SMS), preferably SMS6 and/or SMS5.
• Proficiency with Synopsys VCS for MBIST verification and simulation.
• Deep understanding of the complete MBIST flow:
– MBIST insertion
– Top-level integration
– Verification
– Pattern generation (Vecgen)
– Diagnostics
– Simulation and debug
• Strong understanding of MBIST test algorithms (e.g., March algorithms) and memory repair schemes (BIRA/BISR, redundancy analysis, spare row/column allocation).
• Experience running and debugging:
– No-delay simulations
Cisco Confidential
– With-delay simulations
• Experience supporting silicon bring-up, post-silicon debug, and root-cause analysis of MBIST and memory-related failures.
• Strong debugging and root-cause analysis skills across RTL, MBIST, and simulation environments.
• Ability to work independently with minimal supervision.
• Experience with large, complex SoC designs containing multiple memory instances.
• Familiarity with Verilog/SystemVerilog and standard DFT methodologies.

Preferred Qualifications:

• Experience with advanced SoC DFT integration.
• Familiarity with ATPG and scan insertion flows.
• Experience with scripting (Tcl, Perl, or Python) to automate MBIST flows and debug.
• Experience working in fast-paced semiconductor product development.

Key Skills:

• Synopsys MBIST (SMS5/SMS6)
• Synopsys VCS
• MBIST insertion
• Top-level MBIST verification
• VecGen pattern generation
• MBIST diagnostics
• MBIST repair schemes and memory test algorithms
• No-delay, with-delay simulation and debug
• Silicon bring-up and post-silicon debug
• SoC DFT integration
• Tcl / Perl / Python scripting
• Strong communication skills
• Self-motivated and capable of working independently

Ideal Candidate:

The ideal contractor is a senior, hands-on MBIST engineer who can quickly become productive with minimal ramp-up. They should have deep experience with Synopsys SMS and VCS, excellent debugging skills, strong communication abilities, and a proven track record of independently delivering MBIST implementation, verification, and debug for complex SoC designs.