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Remote Fpga Verification Engineer Jobs (NOW HIRING)

Hirekeyz Inc

Senior FPGA Design Engineer

Yorktown Heights, NY · Remote

$125K - $173K/yr

Remote Duration: 12+ Months Contract Job Summary: Research team has a need for an Electrical ... Job Duty 3 - Work with Software team and Electronics Design team to test and verify functionality ...

ALTEN Technology USA

FPGA Firmware Engineer

San Diego, CA · On-site +1

$135K - $140K/yr

Role Overview This is a fully REMOTE role You will be a key contributor to a safety-critical ... Design and verify preliminary FPGA logic for overspeed protection functions, implementing ...

Lockheed Martin Corporation

$123K - $169K/yr

... or verification, and experience in leading or managing SOC, ASIC or FPGA projects or managing ... As an ASIC & FPGA Associate Engineering Manager , you will lead and manage a team of ASIC/FPGA ...

Next Step Systems

FPGA Engineer - Work From Home

Chicago, IL · On-site +1

$133K - $172K/yr

FPGA Engineer - Work From Home We are seeking a talented and self-motivated FPGA Engineer to join a ... This position is 100% Remote. Responsibilities: - Architect and code FPGA designs in a hardware ...

MatX

Formal Verification Engineer

Mountain View, CA · On-site +1

$150K - $287K/yr

We are seeking a Formal Verification Engineer to bring rigorous mathematical guarantees to our ... Remote Perks - We work remotely Monday & Friday, supported by home-tech setup and remote wifi ...

ALTEN Technology USA

FPGA Firmware Engineer

San Diego, CA · On-site +1

$135K - $140K/yr

Role Overview This is a fully REMOTE role You will be a key contributor to a safety-critical ... Design and verify preliminary FPGA logic for overspeed protection functions, implementing ...

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All JobsFpga Verification Engineer JobsRemote Fpga Verification Engineer Jobs

Remote Fpga Verification Engineer information

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$80K

$142.6K

$203.5K

How much do remote fpga verification engineer jobs pay per year?

As of Jun 9, 2026, the average yearly pay for remote fpga verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What is the difference between Remote Fpga Verification Engineer vs Remote Digital Design Engineer?

AspectRemote Fpga Verification EngineerRemote Digital Design Engineer
Primary FocusVerifying FPGA designs through testing and simulationDesigning digital FPGA hardware architectures
Skills & CertificationsHardware description languages, verification tools, FPGA testingHardware description languages, digital design, FPGA development
Work EnvironmentTesting labs, simulation environments, remote collaborationDesign studios, simulation tools, remote design teams
Industry UsageElectronics, telecommunications, aerospaceElectronics, consumer devices, communications

While both roles involve FPGA work, the Remote Fpga Verification Engineer focuses on testing and verifying FPGA designs, ensuring functionality and performance. In contrast, the Remote Digital Design Engineer is responsible for creating and implementing FPGA hardware architectures. Both roles require similar technical skills but differ in their primary responsibilities within the FPGA development lifecycle.

More about Remote Fpga Verification Engineer jobs
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Remote Fpga Verification Engineer jobs near you
Infographic showing various Remote Fpga Verification Engineer job openings in the United States as of May 2026, with employment types broken down into 83% Full Time, 3% Part Time, and 14% Contract. Highlights an 100% Remote job distribution, with an average salary of $142,619 per year, or $68.6 per hour.
Principal Verification Engineer (Remote)

Principal Verification Engineer (Remote)

FortifyIQ

Salem, MA • Remote

$148K/yr

Full-time

Posted 6 days ago

Job description

We're hiring an experienced Principal Verification Engineer to lead and innovate across multiple product lines. You'll define verification strategies, develop advanced test environments, and collaborate globally to ensure every design meets the highest performance and reliability standards.

Responsibilities

  • Lead verification planning and execution at the block and full-chip level.
  • Partner with architects and designers to align verification goals with design intent.
  • Build, enhance, and maintain UVM-based verification environments.
  • Achieve and track coverage metrics to ensure complete functional validation.
  • Collaborate with lab teams for silicon bring-up and debug.- Drive verification methodology improvements and mentor team members.

Qualifications

  • MSEE with 10+ years or PhD with 7+ years of verification experience.- Advanced knowledge of SystemVerilog and UVM methodology.
  • Proficiency in EDA tools such as VCS, Xcelium, and IMC.
  • Strong scripting and automation skills (Python, Perl).
  • Excellent communication and leadership across cross-functional teams.

Preferred / Plus

  • Understanding of SVA and regression management tools (e.g., Jenkins).