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Junior Fpga Verification Engineer Jobs (NOW HIRING)

Saransh Inc

FPGA Verification Engineer

Mountain View, CA · On-site

$153K - $197K/yr

FPGA Verification Engineer Location: Mountain View, CA (Onsite from Day 1) Contract Must Have Skills: * Strong understanding of FPGA design principles and architectures * Proficiency in System ...

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As of Jul 29, 2026, the average yearly pay for junior fpga verification engineer in the United States is $71,799.00, according to ZipRecruiter salary data. Most workers in this role earn between $48,500.00 and $80,000.00 per year, depending on experience, location, and employer.
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Infographic showing various Junior Fpga Verification Engineer job openings in the United States as of July 2026, with employment types broken down into 96% Full Time, 1% Part Time, and 3% Contract. Highlights an 87% Physical, 5% Hybrid, and 8% Remote job distribution, with an average salary of $71,799 per year, or $34.5 per hour.

FPGA Verification Engineer

Sun Technologies,Inc.

Owego, NY • On-site

$60 - $80/hr

Other

Medical, Retirement

Posted 19 hours ago

Job description

Job Title: FPGA Verification Engineer

 

Duration: up to 6 months Contract to Hire (CTH / temp to hire)

Location: Owego, NY 13827

 

Candidates to be onsite in Owego and at their desk or in a lab, but the manager wants to give them the ability to work remotely occasionally

 

Work Schedule: 4/10 – 1st Shift, Monday to Thursday; 10 hours per day.

 

Pay Rate: $60/hr - $80/hr on W2 [the pay rate may differ depending on your skills, education, experience, and other qualifications]

Featured Benefits:

·         Medical Insurance in compliance with the ACA

·         401(k)

·         Sick leave in compliance with applicable state, federal, and local laws

Skills Required:

·         Experienced FPGA Verification Engineer to support the development and certification of safety critical avionics hardware.

·         The engineer will support verification activities required for DO 254 compliance, including requirement analysis, test development, execution, simulation, coverage analysis, and back annotation of results. The role will work closely with design, systems, and certification teams to ensure the FPGA design meets stringent DO-254 Level A standards.

·         Experience with FPGA design tools (Xilinx Vivado, Intel Quartus, Synopsys Synplify).

·         Proficient in SystemVerilog

·         Proficiency with HDL simulators, waveform viewers, and coverage tools.

·         Familiarity with hardware in the loop (HIL) test setups and test equipment (e.g., JTAG, logic analyzers).

·         Prior involvement in FAA or EASA certification audits.

·         Experience with version control systems and configuration management.
 

Desired skills:

·         Proficient in UVM. Proficient in C.

Job Description:

·         The selected candidate will be responsible for ASIC & FPGA development on R&D program.

·         This engineer with have experience in developing, testing, and integrating digital signal processing (DSP), high speed digital design, high speed communication and system-on-chip (SOC) implemented on FPGA platforms.

·         Experience with COTS based control platforms and embedded processors on FPGA platforms.

·         This person will help develop more affordable ways to automate and develop scripts to improve FPGA development efforts.

·         Cross discipline collaboration with Systems Architects, RF/Analog & Digital Circuit designers and ASIC/FPGA engineers to create leading edge products for future business growth, contributing to complex systems employing high speed networking concepts.

·         The selected candidate will also provide support and technical direction to junior engineers.

·         Overall contribution to design, simulation, verification, integration & test of complex, high speed products.

Apply