We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together,ย Teradyneย companies deliver manufacturing automation across industries and applications around the world!
We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive.
Our Purpose
TERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought and in our workforce. Our employees are supportedย to innovate and learn something new every day.
We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team - one that makes better decisions, drives innovation and delivers better business results.
Opportunity Overview
Theย Logicย Design Managerย isย responsible forย leading a team of developersย inย designing and verifyingย FPGA'sย for Teradyneย Computeย Test Division's nextย generationย products.ย In this role you willย lead a team ofย ~4-6ย engineers in a fast-paced environmentย toย help the organizationย meet key business needs.ย Requires closeย collaborationย withย theย otherย FPGA design and verification managers and with otherย engineeringย disciplinesย includingย mixed signalย ASIC design,ย circuit board design,ย softwareย and systemsย engineeringย toย specify andย implementย new products.ย You should have hands-on experience with complexย FPGAย (and preferably digitalย ASIC)ย SOC designs for real-world products. Youย also shouldย have a provenย track recordย of managing engineering teams towardย timelyย deliverables and successful project completion.ย ย
All About You
We seek individuals who share our passion and determination. Our commitment to customer success drives us to go the extra mile. If you're ready to join us in this mission, take a closer look at the minimum criteria for the position.
- BSEEย orย MSEEย andย 12+ years of relevant experience in Digitalย FPGAย design and integrationย (Digitalย ASICย experience is a plus).ย
- Minimum of 5 years of experience as an FPGA/ASIC project lead, driving multiple projects from concept, architecture exploration, design implementation and lab validation to production release.ย
- Extensive experience coding RTLย (verilogย preferred).ย
- Extensive experienceย usingย digital simulation tools (Cadence preferred).ย
- Extensive experienceย usingย static timing analysis tools.ย
- Experience designing with the following: PCIe, DDR3/4/5, AXI, ethernet, SPI, SERDESย
- Experience with eitherย AMDย orย Alteraย FPGAs andย development toolsย (Vivado/Quartus), preferably both.ย
- Experienceย usingย digital design qualityย toolsย e.g.ย LINT, CDC.ย
- Experience with bug tracking tools (Jiraย etc.)ย
- Experience with source control systems (Clearcase, Git, CVS) and continuous integration.ย
- Familiarity with digital verification tools and methodologies (preferably UVM).ย
- Experience with projectย schedulingย tools (e.g.ย Microsoft project)ย
- Experience with embedded processorsย and digital signal processing is a plus.ย
- Experience with high level programming languages (C, C++) is a plus.ย
- Excellent presentation and communication skills.ย
- Preferred: Experience developing hardware for automated test equipment is a plus.ย
- Preferred: 2-3 years of experience as a first level manager of an engineering team.ย
Compensation:
The base salary range for this role is $155,500 - $ 248,700. This range is a good faith estimate, and the amount of base salary will correspond with experience and skill set. This range can also fluctuate depending on demand and location.
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Incentive Plan: This job is eligible for discretionary bonus(es) based on financial performance.ย
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Benefits:
Teradyne offers a variety of robust health and well-being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation & holidays, tuition assistance programs, and more.ย Please click here to see details.ย ย
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