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Remote Advanced Micro Targeting Jobs in California

Cerebras Systems

Design Verification Engineer

Sunnyvale, CA · On-site +1

$120K - $240K/yr

Develop and implement verification strategies, detailed tests, and coverage plans based on micro ... Advanced debugging and problem-solving skills. * Deep knowledge of SystemVerilog testbench, DPI ...

TalentBurst, Inc.

Sr. UX UI Designer

Fairfield, CA · Remote

This is a remote role with occasional trips to Alameda (Alameda : 2601 Harbor Bay Parkway) for ... micro interactions, transitions, and animated states that communicate purpose and feedback • ...

VASL

Lead Generation Specialist

San Francisco, CA · Remote

Lead Generation Specialist (Remote) Job Timings: 8 am - 1 pm Pacific Standard Time (Part-time) ... You'll identify and qualify prospective healthcare clients using advanced prospecting tools and ...

LVI Associates

Senior Civil/Structural Engineer

Los Angeles, CA · On-site +1

$108K - $147K/yr

Perform advanced analysis using finite element modeling and other analytical tools * Act as a ... Flexible work model across multiple locations or remote If you are interested in working on complex ...

General Motors

Senior Brand Product Designer

Sunnyvale, CA · On-site

$125K - $192K/yr

Remote candidates will also be considered. If you live outside a 50-mile radius of these locations ... Advanced proficiency with Figma and modern design workflows for concept development, prototyping ...

General Motors

Senior Brand Product Designer

Sunnyvale, CA · On-site +1

$125K - $192K/yr

Remote candidates will also be considered. If you live outside a 50-mile radius of these locations ... Advanced proficiency with Figma and modern design workflows for concept development, prototyping ...

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Design Verification Engineer

Design Verification Engineer

Cerebras Systems

Sunnyvale, CA • On-site, Remote

$120K - $240K/yr

Other

Posted 3 hours ago

Job description

Key Responsibilities 

  • Work with architects, designers, post-silicon, and software engineers, to ensure a high-quality design that works for silicon. 
  • Develop and implement verification strategies, detailed tests, and coverage plans based on micro-architecture. 
  • Create verification methodologies and reusable environments, including components such as stimulus, checkers, assertions, and coverage. 
  • Implement tests, manage regressions, gather coverage, and debug test failures. 
  • Collaborate with cross-functional teams, including architecture, RTL design, physical design, firmware, and validation. 
  • Analyze and debug complex issues across simulation, emulation, and silicon bring-up phases. 
  • Continuously enhances verification infrastructure and flows to improve efficiency and quality. 
  • Contribute to the evolution of the overall verification methodology and best practices across the organization. 

Skills and Qualifications 

  • Advanced debugging and problem-solving skills. 
  • Deep knowledge of SystemVerilog testbench, DPI, and UVM. 
  • Excellent programming skills and knowledge of software engineering practices, including object-oriented design. 
  • Experience developing scalable and portable testbenches and components. 
  • Experience with verification methodologies and tools such as simulators, waveform viewers, build and run automation, coverage collection, and gate-level simulations. 
  • Proficient in scripting languages such as Python or Perl. 
  • Good interpersonal skills and the ability to work as a standout colleague are a must. 
  • Extremely self-motivated and eager to solve problems 
  • 3+ years of Design Verification experience. 

Desired Skills and Qualifications 

  • Knowledge of pipelined processor architecture. 
  • BS or MS in Computer Science or Electrical Engineering. 
  • 3+ years of hands-on Design Verification experience. 

The base salary range for this position is $120,000 to $240,000 annually.  Actual compensation may include bonus and equity, and will be determined based on factors such as experience, skills, and qualifications.

We are open to remote candidates.

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