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Race Timing Jobs in California (NOW HIRING)

Broadcom

ASIC Implementation Engineer STA

San Jose, CA · On-site

$159K - $164K/yr

Key Responsibilities: * Full-Chip Timing Sign-off: Own the final timing closure for ASIC ... We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual ...

Broadcom, Inc.

ASIC Implementation Engineer STA

San Jose, CA · On-site

$159K - $164K/yr

Key Responsibilities: * Full-Chip Timing Sign-off: Own the final timing closure for ASIC ... We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual ...

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Race Timing information

See California salary details

$33.6K

$58.2K

$113K

How much do race timing jobs pay per year?

As of Aug 12, 2026, the average yearly pay for race timing in California is $58,208.00, according to ZipRecruiter salary data. Most workers in this role earn between $40,500.00 and $76,000.00 per year, depending on experience, location, and employer.

What are the typical responsibilities of someone working in race timing at sporting events?

Professionals in Race Timing are responsible for setting up timing equipment at event sites, ensuring all systems are functioning correctly, and coordinating with event organizers before and during races. On event day, they monitor timing systems, process participant data in real time, and troubleshoot any technical issues that arise. After the race, they verify results for accuracy and may assist in reporting and distributing official times. This role often involves working early mornings, weekends, and occasional travel, and requires excellent teamwork with race directors, volunteers, and technical staff.

What is a race timing?

A Race Timing job involves managing the timing and results of races, such as marathons, triathlons, and cycling events. Race timers set up and operate timing equipment, ensure accurate participant tracking, and process race results. They may use RFID chips, manual timing systems, or other technologies to record finish times. This role requires attention to detail, technical skills, and the ability to work in fast-paced environments. Race timers often collaborate with event organizers to ensure smooth race operations and accurate reporting.

What are the key skills and qualifications needed to thrive in the race timing position, and why are they important?

To thrive in Race Timing, candidates should have strong organizational skills, attention to detail, and a basic understanding of event management or sports administration. Familiarity with race timing software and hardware, such as RFID chip systems, finish line cameras, and data management platforms, is highly recommended. Effective communication, problem-solving skills, and the ability to remain calm under pressure are essential soft skills in this role. These attributes help ensure accurate results, smooth event operations, and a positive experience for both participants and organizers.

What are the most commonly searched types of Race Timing jobs in California? The most popular types of Race Timing jobs in California are:
What are popular job titles related to Race Timing jobs in California? For Race Timing jobs in California, the most frequently searched job titles are:
What job categories do people searching Race Timing jobs in California look for? The top searched job categories for Race Timing jobs in California are:
What cities in California are hiring for Race Timing jobs? Cities in California with the most Race Timing job openings:
Race Timing jobs near you
Infographic showing various Race Timing job openings in California as of August 2026, with employment types broken down into 1% As Needed, 74% Full Time, 20% Part Time, 2% Temporary, 2% Contract, and 1% Nights. Highlights an 96% Physical, 2% Hybrid, and 2% Remote job distribution, with an average salary of $58,208 per year, or $28 per hour.

Sr. Timing Methodology Engineer

Advanced Micro Devices, Inc

San Jose, CA • On-site

$124K/yr

Full-time

Posted 29 days ago

Advanced Micro Devices rating

8.6

Company rating: 8.6 out of 10

Based on 13 frontline employees who took The Breakroom Quiz

27th of 157 rated electronics manufacturers

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
In this senior position, you will be defining, developing, and driving timing methodologies across the Adaptive and Embedded Computing Group. You will work closely with architecture, product planning, process, design, and product engineering teams to realize silicon solutions with best-in-class PPA. You will bring your experience and expertise to solve the teams most pressing challenges in sign-off and modeling methodologies at 2nm and beyond on monolithic and 2.5/3DIC adaptive SOCs and FPGAs. Your solutions will enable products to compete in markets from the edge to the cloud while pushing the limits of performance and efficiency.
THE PERSON:
You are detailed oriented, possessing effective communication skills, and an experienced problem solver. You are passionate about optimizing for power, performance and area while meeting schedules and managing cost. You embrace cross-functional collaboration and continuous learning. You are comfortable in converting high level requirements from product planning, foundry, and other stakeholders into a set of methodologies and guidelines for the design community.
KEY RESPONSIBILITIES:
  • Define, develop, optimize and drive design, timing and power methodologies for advance process nodes.
  • Collaborate with implementation and sign-off teams.
  • Collaborate with CAD, power integrity, foundry teams and EDA vendors to understand margins and sign-off risks and develop mitigation strategies.

PREFERRED EXPERIENCE:
  • Experienced custom, physical design and/or sign-off engineer
  • Expert user of industry-standard physical design, analysis, and sign-off tools
  • Experience with FPGA implementation tools.
  • Experience advocating for technical solutions in a collaborative team environment.
  • Excellent communication and collaboration skills
  • Good programming skills (Python, Perl, Tcl)

ACADEMIC CREDENTIALS:
  • Bachelors or Masters degree in computer engineering/Electrical Engineering

LOCATION:
San Jose, CA
This role is not eligible for visa sponsorship.
#LI-SL2
#LI-HYBRD
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.
This posting is for an existing vacancy.

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