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Principal Mixed Signal Verification Engineer Jobs

TekClap

Signal Verification Engineer

San Jose, CA · On-site

$159K/yr

We are seeking a highly motivated AMS/DMS Verification Engineer with expertise in mixed-signal verification, RF systems, and high-speed PHY technologies. In this role, you will work alongside Analog ...

Renesas Electronics Corporation

* Design and architect mixed-signal verification environments, including Real Number Model (RNM) and ... Principal Verification Engineer to lead the verification efforts for our Automotive PMIC (Power ...

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How much do principal mixed signal verification engineer jobs pay per year?

As of Sep 13, 2026, the average yearly pay for principal mixed signal verification engineer in the United States is $147,220.00, according to ZipRecruiter salary data. Most workers in this role earn between $118,500.00 and $173,000.00 per year, depending on experience, location, and employer.

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Infographic showing various Principal Mixed Signal Verification Engineer job openings in the United States as of August 2026, with employment types broken down into 92% Full Time, 2% Part Time, and 6% Contract. Highlights an 86% Physical, 5% Hybrid, and 9% Remote job distribution, with an average salary of $147,220 per year, or $70.8 per hour.

Sr Principal Mixed Signal Verification Engineer

Richardson, TX • On-site

Qorvo, Inc.
Manufacturing • 5 - 10K employees
Learn more about Qorvo, Inc.external

Full-time

Re-posted 14 days ago

Qorvo rating

8.3

Company rating: 8.3 out of 10

Based on 21 frontline employees who took The Breakroom Quiz

Job description

Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers' most complex technical challenges. Qorvo serves multiple high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense. Visit www.qorvo.com to learn how our innovative team is helping connect, protect and power our planet.
Qorvo's fast-growing Power Management division, focused on Power loss protection, PMICs, Motor Control, and Battery Management solutions for a wide range of Mobile, Consumer, IOT and Industrial applications, is looking for an experienced Top-level Design Verification Engineer to create next generation and world-class designs in power management solutions.
Responsibilities:
  • Serve as customer-facing for catalog and custom power-management ICs including motor driver, power-loss protection, point of load, and battery management IC solutions.
  • Develop and execute metric-driven design verification plans based upon IC functional, performance, and test specifications, with a strong focus on the customer use-case.
  • Develop constrained random tests and automated checkers within our TLDV UVM environment.
  • Build high performance, accurate RNM, or VerilogAMS models to support TL simulation.
  • Collaborate with design team to resolve issues identified during verification.
  • Partner with internal design and test teams to ensure device first-pass testability.
  • Continuously improve and align verification methodologies with industry best practices
  • Automate verification tasks where applicable.

Required Qualifications:
  • Bachelor's degree in electrical engineering or a related field, with strong focus on mixed-signal circuit design and verification.
  • 15+ years of experience or an equivalent amount of advanced education and experience in AMS design or verification of analog and power-management ICs.
  • Proficiency in UVM environments, including test cases, coverage models, and global checkers.
  • In-depth knowledge of power-management building blocks such as LDO, Amplifiers, Bandgaps, DCDC regulators, Oscillators, and asynchronous state machines.
  • Excellent problem-solving and debugging skills
  • Effective communication and collaboration skills.
  • Expertise in mixed-signal concepts such as Spice/Spectre and event-based simulator, co-simulation environment, simulation debug, silicon debug

Preferred Qualifications:
  • Master's degree in electrical engineering or a related field, with strong focus on mixed-signal circuit design and verification.
  • Experience in Top-Down Design Methodology.
  • Proficiency in shell or Python scripting.
  • Familiarity with SV-UDN/EENET modeling techniques.
  • Experience with both GUI and command-line simulation flows.
  • Proficiency with SV Assertions and Functional coverage.
  • Understanding integration of AI into a verification workflow

Other: 10% or less domestic or international travel may be required
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MAKE A DIFFERENCE AT QORVO
We are Qorvo. We do more than create innovative RF and Power solutions for the mobile, defense and infrastructure markets - we are a place to innovate and shape the future of wireless communications. It starts with our employees. As a unified global team, we bring a commitment to excellence, growth and a passion for creating what's next. Explore the possibilities with us.
We are an Equal Employment Opportunity (EEO) employer and welcome all qualified applicants. Applicants will receive fair and impartial consideration without regard to any characteristics protected by applicable law, including race, color, religion, sex (as defined by law), national origin, age, military or veteran status, genetic information, or disability.
Qorvo is an E-Verify Employer. For more information, please see the Right to Work and E-Verify Participation posters.

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