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Mixed Signal Design Verification Manager Jobs (NOW HIRING)

Nexperia

$100K - $122K/yr

Mixed Signal Design Verification Engineer****Position Summary**Integrated Circuit Solutions (ICS ... Understand power management chip architectures (ideal diodes, e-fuses, switching converters etc)

Nexperia

$124K - $152K/yr

... mixed-signal IC design verification. In this role, you will be responsible for pre-tapeout ... Understand power management chip architectures (ideal diodes, e-fuses, switching converters etc)

Apple

Mixed-Signal Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF and mixed-signal blocks and their interfaces within the wireless SoC. You will interact with the ...

Apple

Mixed-Signal Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF and mixed-signal blocks and their interfaces within the wireless SoC. You will interact with the ...

Jobtailor

Mixed Signal Design Verification Engineer

Oregon, WI · On-site

$133K - $163K/yr

Design DebuggingLL * Analog Debug Skills Hard Skills * Mixed Signal Logic Components * Analog Behavioral Modeling * IP Verification Plans * System Simulation Models * Power Analysis * Timing Analysis

Apple

Mixed-Signal Verification Engineer

Bodega Bay, CA · On-site

$175K - $308K/yr

As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF ... manage bug tracking, and analyze and close coverage Write scripts for automation of flow Improve ...

Apple

Mixed-Signal Verification Engineer

Bodega Bay, CA · On-site

$122K - $214K/yr

As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF ... manage bug tracking, and analyze and close coverage Write scripts for automation of flow Improve ...

Apple

Mixed-Signal Verification Engineer

Bodega Bay, CA · On-site

$175K - $308K/yr

As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF ... manage bug tracking, and analyze and close coverage Write scripts for automation of flow Improve ...

Apple

Mixed-Signal Verification Engineer

Bodega Bay, CA

$122K - $214K/yr

As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF ... manage bug tracking, and analyze and close coverage Write scripts for automation of flow Improve ...

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Mixed Signal Design Verification Manager information

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$105.5K

$149.2K

$167K

How much do mixed signal design verification manager jobs pay per year?

As of Sep 11, 2026, the average yearly pay for mixed signal design verification manager in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.

What does a mixed signal design verification manager do?

A Mixed Signal Design Verification Manager leads teams responsible for verifying the functionality and performance of integrated circuits that combine both analog and digital components. They develop verification plans, oversee testbench creation, and ensure that the mixed signal designs meet all specifications before production. Their role involves collaborating with design, validation, and product teams to identify and resolve issues early in the development process. This position requires a strong understanding of both analog and digital circuit design, as well as expertise in verification methodologies and tools.

What are the key skills and qualifications needed to thrive as a mixed signal design verification manager?

A Mixed Signal Design Verification Manager needs deep expertise in both analog and digital circuit design, verification methodologies, and a relevant engineering degree, often with several years of experience in mixed-signal IC development. Familiarity with tools like UVM, SystemVerilog, SPICE simulators, and verification management platforms, along with knowledge of industry standards, is crucial. Strong leadership, communication, and problem-solving skills enable effective team management and cross-functional collaboration. These skills ensure rigorous verification, timely project delivery, and high-quality mixed-signal products in a competitive semiconductor market.

What are some common challenges faced by a mixed signal design verification manager, and how can they be addressed?

Mixed Signal Design Verification Managers often face the challenge of coordinating verification tasks across analog, digital, and mixed-signal domains, which require different verification methodologies and tools. Ensuring effective communication and collaboration between cross-functional teams, such as design, verification, and validation, is critical to avoid integration issues and meet project deadlines. Staying updated with evolving verification techniques and managing test coverage for complex circuits are also key challenges. Addressing these involves fostering a collaborative team environment, implementing robust verification plans, and leveraging automation tools to streamline processes.

What are popular job titles related to Mixed Signal Design Verification Manager jobs?

For Mixed Signal Design Verification Manager jobs, the most frequently searched job titles are:

Sr. Mixed Signal Design Verification Manager

Richardson, TX • On-site

Qorvo, Inc.
Manufacturing • 5 - 10K employees
Learn more about Qorvo, Inc.external

$123K - $150K/yr

Other

Re-posted 11 days ago

Qorvo rating

8.3

Company rating: 8.3 out of 10

Based on 21 frontline employees who took The Breakroom Quiz

Job description

Sr. Mixed Signal Design Verification Manager

Experience Level: Management

Job Type: Regular

Location: Richardson, TX, US, 75081

Requisition ID: 10286

Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems‑level expertise and global manufacturing scale to quickly solve our customers' most complex technical challenges. Qorvo serves multiple high‑growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery‑powered appliances, network infrastructure, healthcare and aerospace/defense.

Qorvo’s fast‑growing Power Management division, focused on Power loss protection, PMICs, Motor Control, and Battery Management solutions for a wide range of Mobile, Consumer, IoT and Industrial applications, is looking for an experienced Top‑level Design Verification Engineer to create next generation and world‑class designs in power management solutions.

Responsibilities
  • Manage and grow a team of verification engineers with different levels of experience, from entry level to senior principal level.
  • Drive technical direction and strategy for verification excellence.
  • Serve as customer‑facing for catalog and custom power‑management ICs including motor driver, power‑loss protection, point of load, and battery management IC solutions.
  • Develop and execute metric‑driven design verification plans based upon IC functional, performance, and test specifications, with a strong focus on the customer use‑case.
  • Develop constrained random tests and automated checkers within our TLDV UVM environment.
  • Build high performance, accurate RNM, or Verilog‑AMS models to support TL simulation.
  • Collaborate with design team to resolve issues identified during verification.
  • Partner with internal design and test teams to ensure device first‑pass testability.
  • Continuously improve and align verification methodologies with industry best practices.
  • Automate verification tasks where applicable.
Required Qualifications
  • Bachelor’s degree in electrical engineering or a related field, with strong focus on mixed‑signal circuit design and verification.
  • 15+ years of experience or an equivalent amount of advanced education and experience in AMS design or verification of analog and power‑management ICs.
  • Experience managing or being a functional team lead.
  • Strong technical background with hands‑on experience in UVM, analog and digital design fundamentals, and system level knowledge of power management ICs.
  • Excellent problem‑solving and debugging skills
  • Effective communication and collaboration skills.
  • Expertise in mixed‑signal concepts such as Spice/Spectre and event‑based simulator, co‑simulation environment, simulation debug, silicon debug.
Preferred Qualifications
  • Master’s degree in electrical engineering or a related field, with strong focus on mixed‑signal circuit design and verification.
  • Experience in Top‑Down Design Methodology.
  • Proficiency in shell or Python scripting.
  • Familiarity with SV‑UDN/EENET modeling techniques.
  • Experience with both GUI and command‑line simulation flows.
  • Proficiency with SV Assertions and Functional coverage.
  • Understanding integration of AI into a verification workflow.

Other: 10% or less domestic or international travel may be required.

We are an Equal Employment Opportunity (EEO) employer and welcome all qualified applicants. Applicants will receive fair and impartial consideration without regard to any characteristics protected by applicable law, including race, color, religion, sex (as defined by law), national origin, age, military or veteran status, genetic information, or disability.

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